EPM5192LI-2 vs EPM5192LC84 Comparison
Detailed side-by-side comparison of EPM5192LI-2 by Altera and EPM5192LC84 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192LI-2 | EPM5192LC84 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable/OTP Complex PLD) | — |
| Macrocells | 192 | — |
| Logic Array Blocks (LABs) | 12 | — |
| User I/O | 64 | [DATA_NEEDED: max user I/O count] |
| Total Inputs | 72 (7 dedicated + 64 I/O) | — |
| Propagation Delay (tpd) | 55 ns (max) | — |
| Maximum Internal Frequency | 100 MHz | — |
| Supply Voltage | 4.5 V to 5.5 V | [DATA_NEEDED: VCC range] |
| Operating Temperature | -40 C to +85 C (industrial) | [DATA_NEEDED: operating temperature range] |
| Typical Power Dissipation | 600 mW at 5 V / 25 C | — |
| Technology | CMOS, UV-erasable / OTP | — |
| Package | 84-pin PLCC (J-lead), JEDEC S-PQCC-J84 | LCC-84 (PQCC84, MS-018) |
| Mounting Type | Surface Mount | Surface Mount (Socket-compatible) |
| RoHS Status | [DATA_NEEDED: RoHS status] | unknown |
| Design Toolchain | Altera MAX+plus II | — |
| Product Type | — | Complex Programmable Logic Device (CPLD) |
| Macrocells (Logic Cells) | — | 192 |
| Propagation Delay (tPD) | — | 55 ns |
| Process Technology | — | CMOS |
| Programmability | — | OTP / UV-Erasable |
| Pin Count | — | 84 |
| Configuration Memory | — | EPROM / UV-Erasable |
| Programming Interface | — | JTAG / Altera legacy (MAX+PLUS II baseline) |
| MSL Level | — | [DATA_NEEDED: MSL rating] |