EPM5192LI-2 vs EPM5192LC84 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192LI-2 sa pamamagitan ng Altera at EPM5192LC84 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192LI-2 | EPM5192LC84 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable/OTP Complex PLD) | — |
| Macrocells | 192 | — |
| Logic Array Blocks (LABs) | 12 | — |
| User I/O | 64 | [DATA_NEEDED: max user I/O count] |
| Total Inputs | 72 (7 dedicated + 64 I/O) | — |
| Propagation Delay (tpd) | 55 ns (max) | — |
| Maximum Internal Frequency | 100 MHz | — |
| Volte ng Pagbibigay | 4.5 V to 5.5 V | [DATA_NEEDED: VCC range] |
| Temperature na Operasyon | -40 C to +85 C (industrial) | [DATA_NEEDED: operating temperature range] |
| Typical Power Dissipation | 600 mW at 5 V / 25 C | — |
| Technology | CMOS, UV-erasable / OTP | — |
| Packhaging | 84-pin PLCC (J-lead), JEDEC S-PQCC-J84 | LCC-84 (PQCC84, MS-018) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (Socket-compatible) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Design Toolchain | Altera MAX+plus II | — |
| Product Type | — | Complex Programmable Logic Device (CPLD) |
| Macrocells (Logic Cells) | — | 192 |
| Propagation Delay (tPD) | — | 55 ns |
| Process Technology | — | CMOS |
| Programmability | — | OTP / UV-Erasable |
| Bilang ng Pin | — | 84 |
| Configuration Memory | — | EPROM / UV-Erasable |
| Programming Interface | — | JTAG / Altera legacy (MAX+PLUS II baseline) |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |