EPM570FGF256I5N vs EPM570F256I5 Comparison
Detailed side-by-side comparison of EPM570FGF256I5N by Intel and EPM570F256I5 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM570FGF256I5N | EPM570F256I5 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $19.80 | $12.60 |
| Family | MAX II | MAX II |
| Device Type | CPLD (Complex Programmable Logic Device) | β |
| Logic Elements (LEs) | 570 | β |
| Macrocells | 440 | β |
| Propagation Delay (tPD) | 5.0 ns | β |
| User I/O Pins (max) | 212 | β |
| Package | 256-ball FBGA (FGF256) | β |
| Process Technology | 0.18 micron | β |
| Configuration Memory | Internal Flash (non-volatile, instant-on) | β |
| Programming Interface | JTAG / ISP | JTAG (IEEE 1149.1) / ISP |
| Supply Voltage | 3.3 V core / multi-volt I/O (1.5/1.8/2.5/3.3 V) | β |
| Temperature Grade | Industrial (-40C to +100C) | β |
| Speed Grade | 5 (fast) | I5 |
| Operating Temperature | -40C to +100C | -40C to +85C (industrial) |
| Mounting Type | Surface Mount | Surface Mount |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| RoHS Status | Compliant | [DATA_NEEDED: RoHS status] |
| Logic Elements (LE) | β | 570 |
| Maximum User I/O Pins | β | 160 |
| User Flash Memory (UFM) | β | 8 Kbits |
| Number of LABs/CLBs | β | [DATA_NEEDED: number of LABs] |
| Package Type | β | 256-ball FineLine BGA (FBGA-256) |
| Supply Voltage - Core | β | 3.3 V (also operates at 3.3V per part description) |
| I/O Standards Supported | β | LVTTL, LVCMOS, SSTL, PCI |
| MultiVolt I/O | β | 1.5V / 1.8V / 2.5V / 3.3V |
| In-System Programmability | β | Yes |
| Non-volatile Configuration | β | Yes (on-chip flash) |
| Pin-to-Pin Logic Delay (typ) | β | 5 ns to 7 ns |
| Maximum Internal Frequency | β | [DATA_NEEDED: fMAX MHz per speed grade] |
| Number of PLLs | β | [DATA_NEEDED: number of PLLs] |
| Width | β | 17 mm (per Partstack) |