EPM7128AEFC100-5 vs EPM7128BTC100-10 Comparison
Detailed side-by-side comparison of EPM7128AEFC100-5 by Altera and EPM7128BTC100-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7128BTC100-10 - MAX 7000B CPLD, 128 Macrocells, 10ns | Intel
EPM7128BTC100-10 ⚠ Last Time BuySpecification Comparison
| Parameter | EPM7128AEFC100-5 | EPM7128BTC100-10 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Last Time Buy |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX 7000A | MAX 7000B |
| Logic Family / Base Number | EPM7128A | — |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 | 2.5K |
| Propagation Delay (tPD) | 5 ns | — |
| Internal Frequency (fMAX) | 192.3 MHz | — |
| User I/Os | 84 | 84 |
| Logic Family | CMOS | — |
| Supply Voltage | 3.3 V | — |
| Package | 100-ball FBGA (FineLine BGA) | TQFP-100 |
| Pin Count | 100 | — |
| Mounting Type | Surface Mount | Surface Mount |
| Programmable Type | EEPROM (In-System Programmable) | — |
| Operating Temperature | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| JTAG Support | Yes (IEEE 1149.1 Boundary Scan) | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant (lead-free) |
| Logic Array Blocks (LABs) | — | 8 (16 macrocells each) |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Frequency (fCNT) | — | 125 MHz |
| Core Voltage (VCCINT) | — | 2.5 V |
| I/O Voltage (VCCIO) | — | 3.3 V (5V tolerant inputs) |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |
| Technology | — | CMOS EEPROM |