EPM7128AETI144-10N vs EPM7128ATC144-10 Comparison

Detailed side-by-side comparison of EPM7128AETI144-10N by Altera and EPM7128ATC144-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7128AETI144-10N EPM7128ATC144-10
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Family MAX 7000A —
Macrocells 128 128
Usable Gates 2,500 —
Logic Array Blocks (LABs) 8 —
Maximum User I/O Pins 100 —
Propagation Delay (tPD) 10 ns 10 ns
Supply Voltage (VCCINT) 3.0 V to 3.6 V (3.3 V nominal) —
Programming Technology EEPROM (in-system programmable) —
JTAG Interface IEEE Std 1149.1 BST compliant —
Package TQFP-144 (144-pin) —
Operating Temperature -40C to +85C (industrial) 0C to +70C (commercial)
Process Technology 0.35 µm CMOS EEPROM —
Mounting Type Surface Mount Surface Mount
MSL Level 3 —
RoHS Status Compliant unknown (legacy Altera device)
Speed Grade -10 (10 ns tPD) —
Operating Frequency (fCNT) [DATA_NEEDED: fCNT counter frequency] —
Manufacturer — Altera (now Intel)
Series — MAX 7000A
Device Type — CPLD (Complex Programmable Logic Device)
Programmable Type — EE PLD (EEPROM-based, in-system programmable)
Logic Array Blocks — 4
User I/O Pins — 68
Maximum Counter Frequency — 98 MHz
Supply Voltage - Internal (VCCINT) — 3.0 V to 3.6 V
I/O Voltage Levels — 5.0 V / 3.3 V / 2.5 V compatible (MultiVolt I/O)
In-System Programmability — Yes (IEEE Std 1149.1 JTAG)
Package / Case — 144-TQFP (20 x 20 mm)
Architecture — Multiple Array Matrix (MAX), 2nd generation

Datasheets & Resources

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