EPM7128SLC84-15 vs EPM7128SLI84-10N Comparison
Detailed side-by-side comparison of EPM7128SLC84-15 by Intel and EPM7128SLI84-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7128SLC84-15 - 128-Macrocell MAX 7000S CPLD, 84-PLCC | Intel / Altera
EPM7128SLC84-15 β Last Time BuyAltera
EPM7128SLI84-10N - MAX 7000S CPLD 128 Macro 10ns 84-PLCC | Intel / Altera
EPM7128SLI84-10N NrndSpecification Comparison
| Parameter | EPM7128SLC84-15 | EPM7128SLI84-10N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.40 | $8.45 |
| Family | MAX 7000S | MAX 7000S |
| Device Type | CPLD - Complex Programmable Logic Device | β |
| Macrocells | 128 | β |
| Usable Gates | 2,500 | 2,500 |
| User I/Os | 68 (in 84-PLCC) | 68 |
| Package | 84-Pin PLCC (J-Lead, J84) | 84-pin PLCC (J-Lead) |
| Speed Grade | -15 (15 ns pin-to-pin delay) | β |
| Propagation Delay (tPD) | 15 ns | 10 ns |
| Maximum Internal Frequency (fMAX) | 76.9 MHz | β |
| Logic Family / Process | CMOS, 5V, EEPROM | β |
| Supply Voltage (VCCINT) | 5 V | 4.75 V to 5.25 V (5 V typical) |
| I/O Standard Support | 5.0 V TTL/CMOS (multi-volt I/O compatible with 3.3V) | β |
| Programming Interface | JTAG (IEEE Std. 1149.1), in-system programmable | β |
| Configuration Memory | Non-volatile EEPROM (instant-on, no boot PROM) | β |
| Operating Temperature | 0C to +70C (commercial) | -40 C to +85 C (Industrial) |
| RoHS Status | Non-RoHS (legacy 5V part) | [DATA_NEEDED: RoHS compliance per latest Intel/Altera declaration] |
| Mounting Type | Surface Mount / Socketed (PLCC-84 socket) | Surface Mount |
| Logic Cells / Macro Cells | β | 128 macro cells |
| Number of Logic Elements / Blocks | β | 16 Logic Array Blocks (LABs) |
| Maximum Frequency (fMAX) | β | 125 MHz |
| I/O Voltage Tolerance | β | 3.3 V / 5 V MultiVolt I/O |
| Process Technology | β | CMOS EEPROM |
| Programmability | β | In-system programmable (ISP), non-volatile EEPROM |
| Boundary-Scan (JTAG) | β | IEEE Std 1149.1 compliant |
| Lead-Free | β | [DATA_NEEDED: lead-free per latest Intel/Altera declaration] |