EPM7128SQI100-10 vs EPM7128SQC100-10N Comparison

Detailed side-by-side comparison of EPM7128SQI100-10 by Altera and EPM7128SQC100-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7128SQI100-10 EPM7128SQC100-10N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Active
Stock Status In Stock In Stock
Unit Price (USD) $9.75 $14.95
Family MAX 7000S MAX 7000
Device Type CPLD - Complex Programmable Logic Device CPLD (Complex Programmable Logic Device)
Macro Cells 128 128
User I/Os 84 β€”
Usable Gates 2,500 2,500
Logic Blocks (LABs) 8 (16 macrocells each) β€”
Package Type PQFP-100 β€”
Pin-to-Pin Delay (tPD) 10 ns β€”
Maximum Internal Frequency 125 MHz to 250 MHz β€”
Counter Speed Up to 175.4 MHz β€”
Operating Voltage (VCC) 5 V β€”
Operating Temperature -40C to +85C (Industrial) -40C to +85C (industrial)
Configuration Memory EEPROM (non-volatile) EEPROM (non-volatile)
Program/Erase Cycles 100 minimum β€”
In-System Programming Yes (JTAG IEEE 1149.1) β€”
Logic Family CMOS β€”
I/O Compatibility TTL-compatible, 5V/3.3V multi-voltage β€”
RoHS Status [DATA_NEEDED: RoHS status not in provided data] β€”
Logic Array Blocks (LABs) β€” 8 (16 macro cells each)
User I/O Pins β€” 84
Propagation Delay (tPD) β€” 10 ns
Maximum Frequency β€” 100 MHz
Supply Voltage (VCCINT) β€” 5 V (4.75 V to 5.25 V)
I/O Voltage Tolerance β€” 3.3 V or 5 V (MultiVolt interface)
Package β€” 100-pin PQFP (BQFP)
Programming Interface β€” JTAG (IEEE Std 1149.1), 4-pin
Mounting Type β€” Surface Mount
Lead-Free / RoHS Status β€” Lead-free (N suffix)
Architecture Generation β€” Second-generation MAX

Datasheets & Resources

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