EPM7128STC100-6 vs EPM7128STC100-15N Comparison

Detailed side-by-side comparison of EPM7128STC100-6 by Intel and EPM7128STC100-15N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7128STC100-6 EPM7128STC100-15N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $5.20 $9.20
Family MAX 7000S MAX 7000S
Macrocells 128 β€”
Equivalent Gates 2,500 β€”
User I/O Pins 84 β€”
Pin-to-Pin Delay (tPD) 6 ns β€”
Maximum Internal Frequency (fCNT) 147.1 MHz β€”
Supply Voltage (VCCINT / VCCIO) 5 V β€”
Package 100-pin TQFP (STC100) 100-pin TQFP
Mounting Type Surface Mount β€”
Programming Interface JTAG (IEEE Std. 1149.1) / ISP β€”
Operating Temperature 0C to +70C (commercial) 0C to +70C (commercial)
PCI Compliance 33 MHz PCI Local Bus Rev. 2.2 (-6/-7/-10 grades) β€”
Lead Pitch 1.0 mm (TQFP) β€”
Lead-Free / RoHS Contains lead (non-RoHS original; -6N variant is lead-free) β€”
Configuration Memory On-chip EEPROM (non-volatile) β€”
Product Type β€” CPLD (Complex Programmable Logic Device)
Usable Gates β€” 2,500
Macro Cells β€” 128
Logic Array Blocks (LABs) β€” 8 (16 macro cells each)
Maximum User I/O β€” 84
Pin-to-Pin Logic Delay (tPD) β€” 15 ns (-15 speed grade)
Maximum Internal Frequency β€” 76.9 MHz
Supply Voltage (VCC) β€” 5 V (4.75 V to 5.25 V)
Supply Voltage (VCCIO) β€” 3.3 V or 5 V (per bank)
Technology β€” CMOS EEPROM, in-system programmable
JTAG (IEEE 1149.1) β€” Yes - in-system programming
Output Options β€” Totem-pole or open-drain (per pin)
Dedicated Inputs β€” 4 global inputs
RoHS Status β€” Non-RoHS (legacy SnPb finish typical)
Lifecycle Status β€” Obsolete (PDN effective 2017-06-01)

Datasheets & Resources

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