EPM7128STI100-10N vs EPM7128BTC100-10 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM7128STI100-10N disebabkan oleh Altera dan EPM7128BTC100-10 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EPM7128STI100-10N - 128-Macrocell CPLD, 10ns, 100-pin TQFP | Altera
EPM7128STI100-10N ObsoleteIntel
EPM7128BTC100-10 - MAX 7000B CPLD, 128 Macrocells, 10ns | Intel
EPM7128BTC100-10 ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EPM7128STI100-10N | EPM7128BTC100-10 |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Masa Terakhir Dibeli |
| Family | MAX 7000S | MAX 7000B |
| Architecture | CMOS EEPROM-based CPLD | — |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 (up to 5,000 family max) | 2.5K |
| Logic Array Blocks (LABs) | 8 | 8 (16 macrocells each) |
| Maximum User I/O | 84 | — |
| Pin-to-Pin Logic Delay (tPD) | 10 ns | — |
| Maximum Counter Frequency | 175.4 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| In-System Programmability | Yes (JTAG IEEE 1149.1) | — |
| JTAG Boundary-Scan | Yes (BST) | — |
| Kemasan | 100-pin TQFP | TQFP-100 |
| Suhu Operasi | -40C to +85C (Industrial) | 0C to +70C (commercial) |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Aras MSL | [DATA_NEEDED: MSL level] | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | Compliant (lead-free) |
| Open-Drain I/O Option | Available (per MAX 7000A feature set) | — |
| User I/Os | — | 84 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Frequency (fCNT) | — | 125 MHz |
| Core Voltage (VCCINT) | — | 2.5 V |
| I/O Voltage (VCCIO) | — | 3.3 V (5V tolerant inputs) |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |
| Technology | — | CMOS EEPROM |