EPM7256ATI144-10N vs EPM7256AETC144-10N Comparison

Detailed side-by-side comparison of EPM7256ATI144-10N by Altera and EPM7256AETC144-10N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM7256ATI144-10N EPM7256ATI144-10N - 256-Macrocell MAX 7000A CPLD, 144-TQFP | Altera

EPM7256ATI144-10N - 256-Macrocell MAX 7000A CPLD, 144-TQFP | Altera

EPM7256ATI144-10N ⚠ Last Time Buy

Specification Comparison

Parameter EPM7256ATI144-10N EPM7256AETC144-10N
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last Time Buy Obsolete
Family MAX 7000A MAX 7000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macrocells 256 —
Logic Array Blocks (LABs) 16 —
Usable Gates 5,000 5,000
User I/O Pins [DATA_NEEDED: I/O count for 144-pin TQFP variant] —
Pin-to-Pin Delay 10 ns —
Maximum Internal Frequency 93.5 MHz 95.2 MHz
Supply Voltage VCCINT 3.3 V —
MultiVolt I/O Voltage VCCIO 2.5 V or 3.3 V —
Programming Method IEEE Std. 1149.1 JTAG (ISP) —
Non-volatile Configuration Yes (EEPROM) —
Package TQFP-144 TQFP-144 (ETC suffix)
Operating Temperature -40C to +85C (industrial) -40C to +85C (industrial)
RoHS Status [DATA_NEEDED: RoHS compliance per datasheet] [DATA_NEEDED: RoHS status]
Macro Cells — 256
Logic Array Blocks — 16
Maximum User I/O Pins — 120 (in 144-pin TQFP)
Pin-to-Pin Propagation Delay (tPD) — 10 ns
Supply Voltage (Core) — 3.3 V
I/O Voltage Tolerance — 5 V-tolerant
Configuration Memory — EEPROM (non-volatile, in-system programmable)
Programming Interface — IEEE 1149.1 JTAG (ISP)
Mounting Type — Surface Mount
Technology — CMOS, EEPROM-based
Pin Compatibility — Pin-compatible with 5.0V MAX 7000S family

Datasheets & Resources

Browse All Products Create BOM Request Quote