EPM7256ATI144-10N vs EPM7256AETC144-10N 比較
詳細な並列比較: EPM7256ATI144-10N メーカー: Altera および EPM7256AETC144-10N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM7256ATI144-10N - 256-Macrocell MAX 7000A CPLD, 144-TQFP | Altera
EPM7256ATI144-10N ⚠ ラストタイムバイIntel
EPM7256AETC144-10N - MAX 7000A 256-Macro CPLD, 10ns TQFP-144 | Intel
EPM7256AETC144-10N Obsolete仕様比較
| パラメータ | EPM7256ATI144-10N | EPM7256AETC144-10N |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $30.10 | $15.95 |
| Family | MAX 7000A | MAX 7000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 256 | — |
| Logic Array Blocks (LABs) | 16 | — |
| Usable Gates | 5,000 | 5,000 |
| User I/O Pins | [DATA_NEEDED: I/O count for 144-pin TQFP variant] | — |
| Pin-to-Pin Delay | 10 ns | — |
| Maximum Internal Frequency | 93.5 MHz | 95.2 MHz |
| Supply Voltage VCCINT | 3.3 V | — |
| MultiVolt I/O Voltage VCCIO | 2.5 V or 3.3 V | — |
| Programming Method | IEEE Std. 1149.1 JTAG (ISP) | — |
| Non-volatile Configuration | Yes (EEPROM) | — |
| パッケージ | TQFP-144 | TQFP-144 (ETC suffix) |
| 動作温度 | -40C to +85C (industrial) | -40C to +85C (industrial) |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance per datasheet] | [DATA_NEEDED: RoHS status] |
| Macro Cells | — | 256 |
| Logic Array Blocks | — | 16 |
| Maximum User I/O Pins | — | 120 (in 144-pin TQFP) |
| Pin-to-Pin Propagation Delay (tPD) | — | 10 ns |
| Supply Voltage (Core) | — | 3.3 V |
| I/O Voltage Tolerance | — | 5 V-tolerant |
| Configuration Memory | — | EEPROM (non-volatile, in-system programmable) |
| Programming Interface | — | IEEE 1149.1 JTAG (ISP) |
| 実装タイプ | — | Surface Mount |
| Technology | — | CMOS, EEPROM-based |
| Pin Compatibility | — | Pin-compatible with 5.0V MAX 7000S family |