EPM7256SQC208-15 vs EPM7256SQI208-10 Comparison

Detailed side-by-side comparison of EPM7256SQC208-15 by Altera and EPM7256SQI208-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7256SQC208-15 EPM7256SQI208-10
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $3.65 $0.40
Family MAX 7000S β€”
Series EPM7256 β€”
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 256 256
Logic Array Blocks (LABs) 16 β€”
Usable Gates 5000 5000
User I/O Pins 164 β€”
Pin-to-Pin Delay (tPD) 15 ns β€”
Supply Voltage (VCCINT) 4.75 V to 5.25 V β€”
Operating Temperature Range 0 C to +70 C (Commercial) -40 C to +85 C (Industrial)
Package 208-pin PQFP (28x28 mm) 208-pin PQFP (QFP208)
Mounting Type Surface Mount Surface Mount
Programmable Power Mode Yes (per-macrocell turbo-bit) β€”
JTAG (IEEE 1149.1) Boundary-Scan Yes β€”
In-System Programmability (ISP) Yes β€”
Configuration Memory EEPROM (non-volatile) EEPROM (non-volatile)
RoHS Status Contains lead / RoHS non-compliant (per third-party listing) [DATA_NEEDED: RoHS status]
Lead-Free Status Contains lead β€”
Device Family β€” MAX 7000 (EPM7256)
Logic Array Blocks β€” 16
Maximum User I/O Pins β€” 164
Propagation Delay (tPD) β€” 10 ns
Supply Voltage Range β€” 4.5 V to 5.5 V
Technology β€” CMOS EEPROM
In-System Programmable β€” Yes (IEEE 1149.1 JTAG)
Package Body Material β€” Plastic/Epoxy
Terminal Form β€” Gull Wing
JESD-30 Package Code β€” S-PQFP-G208
JESD-609 Terminal Finish Code β€” E3

Datasheets & Resources

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