EPM7256SRC208-10 vs EPM7256SRC208-15N Comparison
Detailed side-by-side comparison of EPM7256SRC208-10 by Intel and EPM7256SRC208-15N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7256SRC208-10
EPM7256SRC208-10 - MAX 7000S CPLD 256 Macrocell 10ns | Intel
EPM7256SRC208-10 ObsoleteAltera
EPM7256SRC208-15N
EPM7256SRC208-15N - MAX 7000S CPLD 256 Macro | Altera
EPM7256SRC208-15N ObsoleteSpecification Comparison
| Parameter | EPM7256SRC208-10 | EPM7256SRC208-15N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $27.20 | $27.20 |
| Family | MAX 7000S | β |
| Device Type | CPLD (Complex Programmable Logic Device) | β |
| Number of Macrocells | 256 | β |
| Number of Logic Array Blocks (LABs) | 16 | β |
| Number of Gates | 5000 | β |
| Number of User I/O Pins | 164 | β |
| Maximum Propagation Delay (tPD) | 10 ns | β |
| Maximum Operating Frequency | 100 MHz | β |
| Supply Voltage (Internal) | 4.75 V to 5.25 V | β |
| Programmable Type | In System Programmable (ISP, JTAG) | β |
| Configuration Technology | EEPROM | β |
| Package | 208-pin RQFP (BFQFP) exposed pad, 28x28 mm | 208-pin RQFP (PowerQuad Flat Pack) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0C to +70C (TA, commercial) | 0C to +70C (commercial) |
| Terminal Form | Gull Wing | β |
| Package Shape | Square | β |
| Product Status | Obsolete | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant (N suffix) |
| Series | β | MAX 7000S |
| Macrocells | β | 256 |
| Usable Gates | β | 5,000 |
| User I/O Pins | β | 164 |
| Logic Array Blocks (LABs) | β | 16 |
| Pin-to-Pin Delay (tPD) | β | 15 ns |
| Maximum Counter Frequency | β | 76.9 MHz |
| Supply Voltage | β | 5 V |
| Configuration Memory | β | EEPROM (non-volatile) |
| In-System Programmability | β | Yes (IEEE 1149.1 JTAG) |
| I/O Standard | β | 5 V TTL/CMOS compatible |
| Lead Free | β | Yes (N suffix) |
| MSL Level | β | [DATA_NEEDED: MSL level] |
| Number of Terminals | β | 208 |