EPM7256SRC208-15N vs EPM7256SRC208-10 Comparison

Detailed side-by-side comparison of EPM7256SRC208-15N by Altera and EPM7256SRC208-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM7256SRC208-15N EPM7256SRC208-15N - MAX 7000S CPLD 256 Macro | Altera

EPM7256SRC208-15N - MAX 7000S CPLD 256 Macro | Altera

EPM7256SRC208-15N Obsolete

Specification Comparison

Parameter EPM7256SRC208-15N EPM7256SRC208-10
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $27.20 $27.20
Series MAX 7000S β€”
Macrocells 256 β€”
Usable Gates 5,000 β€”
User I/O Pins 164 β€”
Logic Array Blocks (LABs) 16 β€”
Pin-to-Pin Delay (tPD) 15 ns β€”
Maximum Counter Frequency 76.9 MHz β€”
Supply Voltage 5 V β€”
Configuration Memory EEPROM (non-volatile) β€”
Package 208-pin RQFP (PowerQuad Flat Pack) 208-pin RQFP (BFQFP) exposed pad, 28x28 mm
Mounting Type Surface Mount Surface Mount
Operating Temperature 0C to +70C (commercial) 0C to +70C (TA, commercial)
In-System Programmability Yes (IEEE 1149.1 JTAG) β€”
I/O Standard 5 V TTL/CMOS compatible β€”
RoHS Status Compliant (N suffix) [DATA_NEEDED: RoHS status]
Lead Free Yes (N suffix) β€”
MSL Level [DATA_NEEDED: MSL level] β€”
Number of Terminals 208 β€”
Family β€” MAX 7000S
Device Type β€” CPLD (Complex Programmable Logic Device)
Number of Macrocells β€” 256
Number of Logic Array Blocks (LABs) β€” 16
Number of Gates β€” 5000
Number of User I/O Pins β€” 164
Maximum Propagation Delay (tPD) β€” 10 ns
Maximum Operating Frequency β€” 100 MHz
Supply Voltage (Internal) β€” 4.75 V to 5.25 V
Programmable Type β€” In System Programmable (ISP, JTAG)
Configuration Technology β€” EEPROM
Terminal Form β€” Gull Wing
Package Shape β€” Square
Product Status β€” Obsolete

Datasheets & Resources

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