EPM7256SRC208-15N vs EPM7256SRC208-10 对比

详细并排对比 EPM7256SRC208-15N 出自 Altera 和 EPM7256SRC208-10 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPM7256SRC208-15N EPM7256SRC208-15N - MAX 7000S CPLD 256 Macro | Altera

EPM7256SRC208-15N - MAX 7000S CPLD 256 Macro | Altera

EPM7256SRC208-15N Obsolete

规格对比

参数 EPM7256SRC208-15N EPM7256SRC208-10
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $27.20 $27.20
Series MAX 7000S —
Macrocells 256 —
Usable Gates 5,000 —
User I/O Pins 164 —
Logic Array Blocks (LABs) 16 —
Pin-to-Pin Delay (tPD) 15 ns —
Maximum Counter Frequency 76.9 MHz —
电源电压 5 V —
Configuration Memory EEPROM (non-volatile) —
封装 208-pin RQFP (PowerQuad Flat Pack) 208-pin RQFP (BFQFP) exposed pad, 28x28 mm
安装类型 Surface Mount Surface Mount
工作温度 0C to +70C (commercial) 0C to +70C (TA, commercial)
In-System Programmability Yes (IEEE 1149.1 JTAG) —
I/O Standard 5 V TTL/CMOS compatible —
RoHS 状态 Compliant (N suffix) [DATA_NEEDED: RoHS status]
Lead Free Yes (N suffix) —
MSL 等级 [DATA_NEEDED: MSL level] —
Number of Terminals 208 —
Family — MAX 7000S
Device Type — CPLD (Complex Programmable Logic Device)
Number of Macrocells — 256
Number of Logic Array Blocks (LABs) — 16
Number of Gates — 5000
Number of User I/O Pins — 164
Maximum Propagation Delay (tPD) — 10 ns
Maximum Operating Frequency — 100 MHz
Supply Voltage (Internal) — 4.75 V to 5.25 V
Programmable Type — In System Programmable (ISP, JTAG)
Configuration Technology — EEPROM
Terminal Form — Gull Wing
Package Shape — Square
Product Status — Obsolete

数据手册与资源

浏览全部产品 创建 BOM 获取报价