EPM9320ALC84-20 vs EPM9320ALI84-10 Comparison
Detailed side-by-side comparison of EPM9320ALC84-20 by Altera and EPM9320ALI84-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9320ALC84-20 | EPM9320ALI84-10 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | NRND |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocells | 320 | 320 |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum User I/Os | 212 | — |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| Package | PLCC-84 | 84-pin PLCC (Plastic Leaded Chip Carrier) |
| Process Technology | 0.5 µm CMOS EEPROM | CMOS |
| Supply Voltage | 5.0 V | — |
| Programmability | In-system via IEEE 1149.1 JTAG | — |
| Operating Temperature | [DATA_NEEDED: commercial or industrial grade] | — |
| Mounting Type | Surface Mount (PLCC socket compatible) | Surface Mount (PLCC socket compatible) |
| Configuration Memory | Non-volatile EEPROM | — |
| Boundary Scan | JTAG IEEE 1149.1 | — |
| Design Software | MAX+PLUS II / Quartus II (legacy) | — |
| RoHS Status | [DATA_NEEDED: per Altera datasheet] | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 6,000 to 12,000 |
| User I/O Pins | — | 84 |
| Pin-to-Pin Delay (Tpd1) | — | 10 ns |
| Maximum Counter Frequency | — | 144 MHz |
| Supply Voltage (VCC) | — | 5.0 V |
| In-System Programmability | — | Yes, via IEEE 1149.1 JTAG |
| Program Memory Technology | — | CMOS EEPROM |
| Architecture | — | Multiple Array MatriX (MAX) |
| Operating Temperature Range | — | -40C to +85C (Industrial) |