EPM9320ALC84-20 vs EPM9320ALI84-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9320ALC84-20 sa pamamagitan ng Altera at EPM9320ALI84-10 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9320ALC84-20 | EPM9320ALI84-10 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocells | 320 | 320 |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum User I/Os | 212 | — |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| Packhaging | PLCC-84 | 84-pin PLCC (Plastic Leaded Chip Carrier) |
| Process Technology | 0.5 µm CMOS EEPROM | CMOS |
| Volte ng Pagbibigay | 5.0 V | — |
| Programmability | In-system via IEEE 1149.1 JTAG | — |
| Temperature na Operasyon | [DATA_NEEDED: commercial or industrial grade] | — |
| Uri ng Pagpapasok | Surface Mount (PLCC socket compatible) | Surface Mount (PLCC socket compatible) |
| Configuration Memory | Non-volatile EEPROM | — |
| Boundary Scan | JTAG IEEE 1149.1 | — |
| Design Software | MAX+PLUS II / Quartus II (legacy) | — |
| Tindminan RoHS | [DATA_NEEDED: per Altera datasheet] | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 6,000 to 12,000 |
| User I/O Pins | — | 84 |
| Pin-to-Pin Delay (Tpd1) | — | 10 ns |
| Maximum Counter Frequency | — | 144 MHz |
| Supply Voltage (VCC) | — | 5.0 V |
| In-System Programmability | — | Yes, via IEEE 1149.1 JTAG |
| Program Memory Technology | — | CMOS EEPROM |
| Architecture | — | Multiple Array MatriX (MAX) |
| Hanay ng Temperature na Operasyon | — | -40C to +85C (Industrial) |