EPM9320ARI208-10 vs EPM9320ARI208-10N Comparison
Detailed side-by-side comparison of EPM9320ARI208-10 by Intel and EPM9320ARI208-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9320ARI208-10N - MAX 9000 CPLD, 320 Macrocells, 208-RQFP | Altera
EPM9320ARI208-10N ObsoleteSpecification Comparison
| Parameter | EPM9320ARI208-10 | EPM9320ARI208-10N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $27.20 | $16.20 |
| Programmable Type | In System Programmable (ISP) | β |
| Number of Macrocells | 320 | β |
| Number of Logic Elements/Blocks | 20 | β |
| Number of Gates | 6000 | β |
| Number of I/O | 132 | β |
| Propagation Delay tpd(1) Max | 10 ns | β |
| Maximum Counter Frequency | 144.9 MHz | β |
| Voltage Supply - Internal | 4.5 V to 5.5 V | β |
| Operating Temperature | -40 C to +85 C (TA) | -40 C to +85 C (industrial) |
| Mounting Type | Surface Mount | Surface Mount |
| Package / Case | 208-BFQFP Exposed Pad | β |
| Supplier Device Package | 208-RQFP | β |
| Configuration Memory | EEPROM (non-volatile) | β |
| JTAG Interface | IEEE Std. 1149.1 compliant | β |
| PCI Compliance | PCI Local Bus Specification Rev 2.2 | β |
| Product Status | Obsolete | β |
| Packaging | Tray | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | unknown |
| Family | β | MAX 9000 |
| Product Type | β | CPLD (Complex Programmable Logic Device) |
| Usable Gates | β | 6,000 |
| Macrocells | β | 320 |
| Logic Array Blocks (LABs) | β | 20 |
| Maximum Operating Frequency | β | 144.9 MHz |
| Propagation Delay (tPD) | β | 10 ns (speed grade -10) |
| Supply Voltage | β | 4.5 V to 5.5 V |
| Package | β | 208-pin RQFP (S-PQFP-G208) |
| Process Technology | β | CMOS EEPROM |
| Programmability | β | In-system (ISP) via IEEE 1149.1 JTAG |
| Global Dedicated Inputs | β | 16 |
| Architecture | β | Multiple Array MatriX (MAX) third-generation |