EPM9320ARI208-10 vs EPM9320ARI208-10N 比較
詳細な並列比較: EPM9320ARI208-10 メーカー: Intel および EPM9320ARI208-10N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM9320ARI208-10N - MAX 9000 CPLD, 320 Macrocells, 208-RQFP | Altera
EPM9320ARI208-10N Obsolete仕様比較
| パラメータ | EPM9320ARI208-10 | EPM9320ARI208-10N |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $27.20 | $16.20 |
| Programmable Type | In System Programmable (ISP) | — |
| Number of Macrocells | 320 | — |
| Number of Logic Elements/Blocks | 20 | — |
| Number of Gates | 6000 | — |
| Number of I/O | 132 | — |
| Propagation Delay tpd(1) Max | 10 ns | — |
| Maximum Counter Frequency | 144.9 MHz | — |
| Voltage Supply - Internal | 4.5 V to 5.5 V | — |
| 動作温度 | -40 C to +85 C (TA) | -40 C to +85 C (industrial) |
| 実装タイプ | Surface Mount | Surface Mount |
| パッケージ / ケース | 208-BFQFP Exposed Pad | — |
| Supplier Device Package | 208-RQFP | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| JTAG Interface | IEEE Std. 1149.1 compliant | — |
| PCI Compliance | PCI Local Bus Specification Rev 2.2 | — |
| Product Status | Obsolete | — |
| Packaging | Tray | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | unknown |
| Family | — | MAX 9000 |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 6,000 |
| Macrocells | — | 320 |
| Logic Array Blocks (LABs) | — | 20 |
| Maximum Operating Frequency | — | 144.9 MHz |
| Propagation Delay (tPD) | — | 10 ns (speed grade -10) |
| 電源電圧 | — | 4.5 V to 5.5 V |
| パッケージ | — | 208-pin RQFP (S-PQFP-G208) |
| Process Technology | — | CMOS EEPROM |
| Programmability | — | In-system (ISP) via IEEE 1149.1 JTAG |
| Global Dedicated Inputs | — | 16 |
| Architecture | — | Multiple Array MatriX (MAX) third-generation |