EPM9320ARI208-10 vs EPM9320ARI208-10N Vergleich
Detaillierter Direktvergleich von EPM9320ARI208-10 von Intel und EPM9320ARI208-10N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM9320ARI208-10N - MAX 9000 CPLD, 320 Macrocells, 208-RQFP | Altera
EPM9320ARI208-10N ObsoleteSpezifikationsvergleich
| Parameter | EPM9320ARI208-10 | EPM9320ARI208-10N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $27,20 | $16,20 |
| Programmable Type | In System Programmable (ISP) | — |
| Number of Macrocells | 320 | — |
| Number of Logic Elements/Blocks | 20 | — |
| Number of Gates | 6000 | — |
| Number of I/O | 132 | — |
| Propagation Delay tpd(1) Max | 10 ns | — |
| Maximum Counter Frequency | 144.9 MHz | — |
| Voltage Supply - Internal | 4.5 V to 5.5 V | — |
| Betriebstemperatur | -40 C to +85 C (TA) | -40 C to +85 C (industrial) |
| Montageart | Surface Mount | Surface Mount |
| Gehäuse / Bauform | 208-BFQFP Exposed Pad | — |
| Supplier Device Package | 208-RQFP | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| JTAG Interface | IEEE Std. 1149.1 compliant | — |
| PCI Compliance | PCI Local Bus Specification Rev 2.2 | — |
| Product Status | Obsolete | — |
| Packaging | Tray | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | unknown |
| Family | — | MAX 9000 |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 6,000 |
| Macrocells | — | 320 |
| Logic Array Blocks (LABs) | — | 20 |
| Maximum Operating Frequency | — | 144.9 MHz |
| Propagation Delay (tPD) | — | 10 ns (speed grade -10) |
| Versorgungsspannung | — | 4.5 V to 5.5 V |
| Gehäuse | — | 208-pin RQFP (S-PQFP-G208) |
| Process Technology | — | CMOS EEPROM |
| Programmability | — | In-system (ISP) via IEEE 1149.1 JTAG |
| Global Dedicated Inputs | — | 16 |
| Architecture | — | Multiple Array MatriX (MAX) third-generation |