EPM9320RI208-20 vs EPM9320ARI208-10N Comparison

Detailed side-by-side comparison of EPM9320RI208-20 by Intel and EPM9320ARI208-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9320RI208-20 EPM9320ARI208-10N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $18.95 $16.20
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 320 320
Usable Gates 6,000 6,000
Propagation Delay (tPD) 20 ns 10 ns (speed grade -10)
Maximum Operating Frequency 100 MHz 144.9 MHz
Supply Voltage (VCC) 5.0 V β€”
Logic Elements / LABs 20 Logic Array Blocks (16 macro cells each) β€”
Programmable Interconnect Programmable Interconnect Array (PIA) β€”
In-System Programmability Yes - IEEE 1149.1 JTAG, 5.0-V ISP β€”
Dedicated Input Pins 4 (low-skew global) β€”
User I/O Pins [DATA_NEEDED: I/O pin count for 208-pin RQFP] β€”
Package 208-pin RQFP (Power Quad Flat Pack) 208-pin RQFP (S-PQFP-G208)
Operating Temperature Grade Industrial β€”
Technology CMOS EEPROM β€”
Mounting Type Surface Mount Surface Mount
MSL Level [DATA_NEEDED: MSL rating] β€”
RoHS Status [DATA_NEEDED: RoHS compliance] unknown
Product Type β€” CPLD (Complex Programmable Logic Device)
Logic Array Blocks (LABs) β€” 20
Supply Voltage β€” 4.5 V to 5.5 V
Operating Temperature β€” -40 C to +85 C (industrial)
Process Technology β€” CMOS EEPROM
Programmability β€” In-system (ISP) via IEEE 1149.1 JTAG
Global Dedicated Inputs β€” 16
Architecture β€” Multiple Array MatriX (MAX) third-generation

Datasheets & Resources

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