EPM9320RI208-20 vs EPM9320ARI208-10N 比較
詳細並排比較 EPM9320RI208-20 由 Intel 與 EPM9320ARI208-10N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM9320ARI208-10N - MAX 9000 CPLD, 320 Macrocells, 208-RQFP | Altera
EPM9320ARI208-10N Obsolete規格比較
| 參數 | EPM9320RI208-20 | EPM9320ARI208-10N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 320 | 320 |
| Usable Gates | 6,000 | 6,000 |
| Propagation Delay (tPD) | 20 ns | 10 ns (speed grade -10) |
| Maximum Operating Frequency | 100 MHz | 144.9 MHz |
| Supply Voltage (VCC) | 5.0 V | — |
| Logic Elements / LABs | 20 Logic Array Blocks (16 macro cells each) | — |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | — |
| In-System Programmability | Yes - IEEE 1149.1 JTAG, 5.0-V ISP | — |
| Dedicated Input Pins | 4 (low-skew global) | — |
| User I/O Pins | [DATA_NEEDED: I/O pin count for 208-pin RQFP] | — |
| 封裝 | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (S-PQFP-G208) |
| Operating Temperature Grade | Industrial | — |
| Technology | CMOS EEPROM | — |
| 安裝類型 | Surface Mount | Surface Mount |
| MSL 等級 | [DATA_NEEDED: MSL rating] | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | unknown |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 20 |
| 供應電壓 | — | 4.5 V to 5.5 V |
| 工作溫度 | — | -40 C to +85 C (industrial) |
| Process Technology | — | CMOS EEPROM |
| Programmability | — | In-system (ISP) via IEEE 1149.1 JTAG |
| Global Dedicated Inputs | — | 16 |
| Architecture | — | Multiple Array MatriX (MAX) third-generation |