EPM9560ARC208-10N vs EPM9560ARC240-10 Comparison
Detailed side-by-side comparison of EPM9560ARC208-10N by Altera and EPM9560ARC240-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560ARC208-10N | EPM9560ARC240-10 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | 12,000 |
| User I/O Pins | 153 | — |
| Pin-to-Pin Delay | 10 ns | — |
| Internal Counter Frequency | 144.9 MHz | — |
| Supply Voltage | 5 V | — |
| Technology | CMOS EEPROM | — |
| Package | 208-pin RQFP (PowerQuad II) | 240-pin PowerQuad QFP (RQFP / EAR240) |
| Mounting Type | Surface Mount | — |
| Operating Temperature | 0 C to +70 C (commercial) | 0C to +70C (commercial) |
| Configuration Memory | EEPROM (non-volatile) | EEPROM (non-volatile, in-system programmable) |
| In-System Programmability | Yes (JTAG ISP) | — |
| Logic Array Blocks (LABs) | 20 | — |
| Speed Grade | -10 | — |
| RoHS Status | Compliant (N suffix) | [DATA_NEEDED: RoHS status] |
| Lead Finish | [DATA_NEEDED: lead finish] | — |
| MSL Level | [DATA_NEEDED: MSL level] | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Architecture | — | Multiple Array MatriX (MAX) - third generation |
| User I/Os (this package) | — | 191 (per Mouser listing) |
| Internal Frequency | — | 144.9 MHz |
| Propagation Delay (tpd) | — | 11.4 ns |
| Supply Voltage - Internal (VCCINT) | — | 5.0 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V or 5.0 V (selectable) |
| Process Technology | — | CMOS EEPROM |
| Logic Family | — | CMOS |