EPM9560ELI84-20 vs EPM9400LC84-20 Comparison
Detailed side-by-side comparison of EPM9560ELI84-20 by Altera and EPM9400LC84-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560ELI84-20 - MAX 9000 6k-Gate EPLD, 84-Pin PLCC | Intel / Altera
EPM9560ELI84-20 ObsoleteSpecification Comparison
| Parameter | EPM9560ELI84-20 | EPM9400LC84-20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Family | MAX 9000 | MAX 9000 |
| Architecture | Multiple Array MatriX (MAX) - EEPROM-based | Multiple Array Matrix (MAX), 3rd generation, EEPROM-based |
| Usable Gates | 6,000 | 8,000 (6,000 to 12,000 typical range) |
| Macrocells | 560 | 400 |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum User I/O | 212 (package-dependent) | 55 |
| Flip-Flops | 212 | 580 |
| Pin-to-Pin Propagation Delay | 20 ns | 20 ns (speed grade -20) |
| Speed Grade | -20 | — |
| Supply Voltage (VCC) | 5.0 V | — |
| In-System Programmability | 5.0 V ISP via IEEE 1149.1 JTAG | — |
| I/O Standards | 5.0 V, 3.3 V, 2.5 V (multiVolt I/O) | — |
| Package | 84-pin PLCC | 84-pin PLCC (Plastic Leaded Chip Carrier) |
| Mounting Type | Through-Hole / Socket | Surface Mount (PLCC socket or SMT land pattern) |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Process Technology | CMOS EEPROM | CMOS EEPROM |
| Operating Temperature | -40C to +85C (industrial) | Commercial (0C to +70C) - assumed from -20 speed grade |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Maximum Counter Frequency | — | 144 MHz |
| Supply Voltage (VCCINT) | — | 5 V |
| I/O Voltage (VCCIO) | — | 3.3 V or 5 V (configurable) |
| In-System Programming | — | Yes (IEEE 1149.1 JTAG) |