EPM9560GC280-15 vs EPM9560ARI240-10 Comparison

Detailed side-by-side comparison of EPM9560GC280-15 by Altera and EPM9560ARI240-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560GC280-15 EPM9560ARI240-10
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Family MAX 9000 MAX 9000
Device Type EE PLD (CMOS EEPROM-based CPLD) CPLD (Complex Programmable Logic Device)
Macro Cells 560 560
Typical Gates 12,000 —
Maximum Operating Frequency 117.6 MHz —
Propagation Delay (tpd) 15 ns (speed grade -15) —
Propagation Delay (alternate datasheet figure) 16.6 ns —
Supply Voltage (VCCINT/VCCIO) 5.0 V —
Operating Temperature (Commercial) 0C to +70C —
Package Type CPGA-280 (Ceramic Pin Grid Array, 280 pins) —
Mounting Type Through-Hole Surface Mount
Programmability In-System Programmable (ISP) via JTAG IEEE 1149.1 —
Technology CMOS EEPROM, 0.5 um process (MAX third-gen) CMOS, EEPROM-based configuration
Architecture Multiple Array MatriX (MAX) —
RoHS Status Non-compliant (ceramic CPGA, contains lead) [DATA_NEEDED: RoHS status]
Lifecycle Status Obsolete (legacy Altera MAX 9000 family) —
Usable Gates — 12,000
User I/O Pins — 191
Package — 240-pin RQFP (PowerQuad Flat Pack)
Pin-to-Pin Propagation Delay — 10 ns
Internal Frequency — 144.9 MHz
Supply Voltage — 5.0 V
Operating Temperature Range — -40 C to +85 C (industrial)
Configuration Memory — EEPROM (non-volatile, instant-on)
Logic Architecture — Multiple Array MatriX (MAX) with global interconnect array
Moisture Sensitivity Level — [DATA_NEEDED: MSL level]
Number of Terminals — 240
Terminal Form — Gull Wing

Datasheets & Resources

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