EPM9560GC280-15 - MAX 9000 CPLD, 560 Macro Cells, 15ns CPGA280 | Intel / Altera
MPN: EPM9560GC280-15 ✗ End of Life| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $185 | $185.00 |
| 10 | $165 | $1,650.00 |
| 100 | $142.5 | $14,250.00 |
| 250 | $128 | $32,000.00 |
| 500 | $115 | $57,500.00 |
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View Datasheet →EPM9560GC280-15 Maximum Ratings & Electrical Characteristics
| Family | MAX 9000 |
| Device Type | EE PLD (CMOS EEPROM-based CPLD) |
| Macro Cells | 560 |
| Typical Gates | 12,000 |
| Maximum Operating Frequency | 117.6 MHz |
| Propagation Delay (tpd) | 15 ns (speed grade -15) |
| Propagation Delay (alternate datasheet figure) | 16.6 ns |
| Supply Voltage (VCCINT/VCCIO) | 5.0 V |
| Operating Temperature (Commercial) | 0C to +70C |
| Package Type | CPGA-280 (Ceramic Pin Grid Array, 280 pins) |
| Mounting Type | Through-Hole |
| Programmability | In-System Programmable (ISP) via JTAG IEEE 1149.1 |
| Technology | CMOS EEPROM, 0.5 um process (MAX third-gen) |
| Architecture | Multiple Array MatriX (MAX) |
| RoHS Status | Non-compliant (ceramic CPGA, contains lead) |
| Lifecycle Status | Obsolete (legacy Altera MAX 9000 family) |
EPM9560GC280-15 cpga-280 (ceramic pin grid array, 280 pins) Pin Configuration Guide
Complete pinout information for EPM9560GC280-15 (cpga-280 (ceramic pin grid array, 280 pins) package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for EPM9560GC280-15.
Refer to the datasheet for full pin configuration.
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
EPM9560GC280-15 is suitable for 6 applications: High-Reliability Aerospace & Military Systems, Legacy Through-Hole Industrial Control Logic, Microprocessor / DSP Bus Decoding & Glue Logic, Power-Supply Sequencing & Control, Telecom & Networking Backplane Glue Logic, Test & Measurement Instrumentation.
High-Reliability Aerospace & Military Systems
The EPM9560GC280-15's ceramic CPGA-280 package provides hermetic sealing and a wide operating margin essential for aerospace, military, and defense electronics where plastic packages are unacceptable. With 560 macro cells and 12,000 usable gates, it handles substantial glue-logic, redundant bus decoding, and fault-tolerant state machines in avionics, radar, and satellite subsystems. The 5.0V supply and 117.6 MHz maximum internal frequency support legacy MIL-STD-1553 and ARINC-429 interface bridging at commercial-grade temperatures (0C to +70C). For -40C to +85C mission profiles, migrate to the EPM9560ARI240-10 industrial variant in the same MAX 9000 family.
Recommended
Legacy Through-Hole Industrial Control Logic
The EPM9560GC280-15 in its ceramic CPGA-280 through-hole package is purpose-built for legacy industrial control boards that still rely on plated-through-hole PCB assembly and DIP/PGAsocket footprints. Designers use it to consolidate dozens of 74-series glue-logic gates into a single reprogrammable device, simplifying BOM, easing engineering changes, and supporting field reconfiguration via 5.0V JTAG ISP. Its 560 macro cells provide enough capacity for motor-control state machines, sensor-fusion glue logic, and safety-interlock controllers. The 15 ns propagation delay is more than adequate for PLC scan-cycle, encoder decoding, and discrete I/O conditioning tasks typical in factory automation retrofits.
Recommended
Microprocessor / DSP Bus Decoding & Glue Logic
The EPM9560GC280-15's 560 macro cells are well suited to high-density address decoding, chip-select generation, and wait-state insertion in legacy 5.0V microprocessor and DSP systems (68000, 80x86, TMS320). The 15 ns tpd is sufficient to insert zero-wait-state glue logic between a CPU and external peripherals, while 12,000 usable gates accommodate large state machines for DMA controllers and interrupt arbiters. Its JTAG ISP support simplifies board bring-up and firmware revision tracking. Migration paths to surface-mount designs (PQFP-240 PQFP-208) within the same MAX 9000 die make it a future-proof choice for systems in transition.
Recommended
Power-Supply Sequencing & Control
Power-system designers leverage the EPM9560GC280-15's deterministic 15 ns propagation delay and EEPROM-based instant-on behavior to implement multi-rail power-supply sequencing, fault monitoring, and hot-swap control. The 5.0V supply tolerance matches standard analog power-management ICs, while the 560 macro cells can supervise four to eight voltage rails with PG (power-good) feedback, watchdog timers, and orderly shutdown sequencing. The ceramic CPGA-280 package tolerates high-temperature environments typical of power-electronics enclosures. JTAG ISP enables last-minute sequence-table adjustments without board removal - critical for telecom and networking infrastructure.
Recommended
Telecom & Networking Backplane Glue Logic
Telecom and networking backplanes frequently require fast, deterministic glue logic for bus arbitration, clock distribution, and protocol bridging - functions well served by the EPM9560GC280-15's 117.6 MHz maximum internal frequency and 15 ns tpd. The 560 macro cells can implement custom proprietary bus protocols, FIFO controllers, and SERDES-side state machines. JTAG boundary scan (IEEE 1149.1) is essential for backplane board-level test in high-density telecom equipment. The ceramic CPGA package also suits central-office equipment with stringent long-term reliability requirements.
Recommended
Test & Measurement Instrumentation
Test-and-measurement instruments such as logic analyzers, protocol exercisers, and ATE fixtures benefit from the EPM9560GC280-15's high macro-cell count and instant-on EEPROM configuration. The device can implement custom pattern generators, timing generators, and parallel-bus protocol emulators with deterministic 15 ns timing. Its CPGA-280 package allows easy socketing for firmware upgrades in laboratory and production-test environments. JTAG boundary-scan support streamlines board-level test, while 12,000 usable gates accommodate complex sequencer logic without external memory.
Recommended
Recommended Products Summary
Engineering reference data for EPM9560GC280-15 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | EPM9560ARC304-10F | EPM9560ABC356-10 | EPM9560ARI240-10 | EPM9560ARC240-10 |
|---|---|---|---|---|---|
| Brand | Altera (now Intel FPGA) | Altera | Altera | Altera | Altera |
| Package | CPGA-280 (ceramic, through-hole) | CPGA-280 (ceramic, through-hole) | CPGA-356 (ceramic, through-hole) | PQFP-240 (plastic, surface-mount) | PQFP-240 (plastic, surface-mount) |
| Family / Architecture | MAX 9000 / EEPROM CPLD | MAX 9000 / EEPROM CPLD | MAX 9000 / EEPROM CPLD | MAX 9000 / EEPROM CPLD | MAX 9000 / EEPROM CPLD |
| Macro Cells | 560 | 560 | 560 | 560 | 560 |
| Speed Grade (tpd) | 15 ns | 10 ns (faster) | 10 ns (faster) | 10 ns (faster) | 10 ns (faster) |
| Maximum Internal Frequency | 117.6 MHz | 117.6 MHz | 117.6 MHz | 117.6 MHz | 117.6 MHz |
| Supply Voltage | 5.0 V | 5.0 V | 5.0 V | 5.0 V | 5.0 V |
| Temperature Grade | Commercial (0C to +70C) | Commercial | Commercial | Industrial (-40C to +85C) | Commercial |
| RoHS Compliance | Non-compliant (ceramic CPGA, contains lead) | Non-compliant | Non-compliant | Compliant (plastic PQFP) | Compliant (plastic PQFP) |
Key Differentiators
- Ceramic CPGA-280 hermetic package for high-reliability environments (vs EPM9560ARC240-10 (PQFP-240))
- Through-hole CPGA socket compatibility for legacy PCB assemblies (vs EPM9560ABC356-10 (CPGA-356))
- Original MAX 9000 family with longest production history (vs EPM7512BQC208-7 (MAX 7000B family))
Design Notes
The ceramic CPGA-280 package has excellent thermal performance compared to plastic QFP variants, with a typical theta-JA of approximately 15-20 C/W depending on socket and airflow. For continuous full-toggle operation across all 560 macro cells at 117.6 MHz, expect junction-temperature rise of 25-40 C above ambient. Forced-air cooling (200 LFM minimum) is recommended for sealed enclosures. Designers migrating to the PQFP-240 variants should plan for higher theta-JA (approximately 30-40 C/W) and may need copper pours or heatsinks to maintain the same thermal margin.
Place at least one 0.1 uF decoupling capacitor per VCC pin pair of the CPGA-280 device, located within 5 mm of the package. Add bulk 10-47 uF tantalum or ceramic capacitors near the package for low-frequency supply stabilization. The CPGA pin grid means VCC and GND are distributed throughout the array - not all on one side like a QFP - so a power plane on an inner PCB layer with multiple stitched vias near each VCC/GND pin is the most effective strategy. JTAG TCK should be kept short and shielded if the JTAG chain runs through noisy backplane connectors.
Do not assume the CPGA-280 pinout is interchangeable with PQFP-240 even though they share the same die - pin maps differ because of the different package outline. When migrating from CPGA-280 to PQFP-240 in Quartus II, you must reassign pins and recompile the design. Also note that the obsolete EPM9560GC280-15 is leaded (non-RoHS); new designs targeting RoHS must use the PQFP-240 same-die variants. Finally, the 5.0V VCC is non-tolerant of 3.3V signals without external level shifters, so mixed-voltage designs need additional glue logic.
At 117.6 MHz toggle rates on long CPGA pins, controlled-impedance routing (50 ohm microstrip) is recommended for clock and high-speed I/O nets. The ceramic package has lower lead inductance than plastic QFPs, which generally improves signal integrity, but the through-hole stub can introduce reflections if not back-drilled. Use series termination at the driver for clock signals longer than 50 mm. JTAG signals (TCK, TMS, TDI, TDO) should be guarded by ground traces on both sides to prevent crosstalk into adjacent I/O.
Compliance Information
Ceramic CPGA-280 package contains lead; non-RoHS by package construction. Same-die PQFP-240 variants (EPM9560ARI240-10, EPM9560ARC240-10) are RoHS-compliant.
