EPM9560R1208-20 vs EPM9560GC280-20 Comparison

Detailed side-by-side comparison of EPM9560R1208-20 by Altera and EPM9560GC280-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560R1208-20 EPM9560GC280-20
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $22.40 $360.00
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Usable Gates 6,000 12,000
Macrocells 560 560
Logic Array Blocks 52 (typical for 560 macrocells) β€”
Maximum User I/O 212 212
Propagation Delay (tPD) 20 ns β€”
Maximum Frequency (fMAX) 125 MHz β€”
Supply Voltage (VCCINT/VCCIO) 5.0 V β€”
Technology CMOS EEPROM β€”
In-System Programmability Yes (IEEE 1149.1 JTAG) β€”
Operating Temperature 0C to +70C (commercial) [DATA_NEEDED: commercial/industrial/military grade]
Package R-1208 (BGA-style fine-pitch) 280-pin CPGA (Ceramic Pin Grid Array)
Mounting Type Surface Mount Through-Hole (CPGA socket)
Process Technology CMOS EEPROM, third-generation MAX architecture CMOS EEPROM
Architecture Multiple Array MatriX (MAX) with Logic Array Blocks (LABs) and Programmable Interconnect Array (PIA) β€”
Boundary-Scan Test JTAG IEEE Std. 1149.1 β€”
Configuration Memory On-chip EEPROM (non-volatile) β€”
RoHS Status [DATA_NEEDED: confirm via current distributor data] [DATA_NEEDED: CPGA package historically contains Pb; likely non-compliant]
Pin-to-Pin Delay β€” 20 ns (speed grade -20)
Counter Frequency (max) β€” 100 MHz
Supply Voltage (VCCINT) β€” 4.75 V to 5.25 V (5.0 V nominal)
I/O Voltage β€” 3.3 V or 5.0 V configurable
In-System Programming β€” Yes, via IEEE 1149.1 JTAG

Datasheets & Resources

Browse All Products Create BOM Request Quote