EPM9560RC208-14 vs EPM9560RC208-13 Comparison
Detailed side-by-side comparison of EPM9560RC208-14 by Altera and EPM9560RC208-13 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RC208-14 | EPM9560RC208-13 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 16 | 20 |
| User I/O Pins | 149 | 208 |
| Maximum Operating Frequency | 117.6 MHz | — |
| Pin-to-Pin Propagation Delay | 14 ns | — |
| Supply Voltage | 5 V | 5.0 V |
| I/O Voltage Support | 3.3 V / 5 V | — |
| Program Memory Type | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (JTAG, IEEE 1149.1) | — |
| Package | 208-pin RQFP (PQFP) | 208-pin RQFP (Power Quad Flat Pack) |
| Mounting Type | Surface Mount | Surface Mount |
| Process Technology | 0.35 µm CMOS EEPROM | — |
| RoHS Status | Non-compliant (legacy part) | [DATA_NEEDED: RoHS status] |
| Device Family | — | MAX 9000 EPLD |
| Package Code | — | RC208 |
| Speed Grade | — | -13 (13 ns pin-to-pin) |
| Propagation Delay (tPD) | — | 13 ns |
| Maximum Clock Frequency | — | 125 MHz |
| Configuration Technology | — | EEPROM (non-volatile) |
| Programming Interface | — | IEEE 1149.1 JTAG |
| Operating Temperature Range | — | 0C to +70C (commercial) |
| Lead-Free Status | — | [DATA_NEEDED: lead-free status] |
| MSL Level | — | [DATA_NEEDED: MSL level] |