EPM9560RC208-16 vs EPM9560RC208-10 Comparison

Detailed side-by-side comparison of EPM9560RC208-16 by Intel and EPM9560RC208-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560RC208-16 EPM9560RC208-10
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status NRND Obsolete
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Logic Elements / Macrocells 560 macrocells —
Typical Gates 12,000 gates —
Usable Gates 12,000 (typical) 12,000
Pin-to-Pin Delay (tPD) 16 ns 10 ns
Maximum Internal Frequency (fMAX) 117.6 MHz —
Supply Voltage (VCCINT / VCCIO) 5 V —
User I/O Pins 416 —
Package 208-pin Power Quad Flat Pack (RQFP) 208-pin RQFP (Plastic Quad Flat Pack)
Mounting Type Surface Mount Surface Mount
Process Technology 0.35 µm CMOS EEPROM 0.30 µm CMOS EEPROM
Programmability In-system via JTAG (IEEE 1149.1) JTAG (IEEE 1149.1) in-system programming
Operating Temperature [DATA_NEEDED: industrial/commercial temperature grade] 0C to +70C (commercial)
RoHS Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: not stated in retrieved distributor listings]
Speed Grade -16 —
Macrocells — 560
Logic Array Blocks (LABs) — 16
Maximum User I/O Pins — 212 (208-pin package variant)
Maximum Frequency (fMAX) — [DATA_NEEDED: internal toggle frequency in MHz]
Supply Voltage (VCCINT) — 5.0 V
I/O Standards Supported — 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O)
Configuration Memory — EEPROM (in-system programmable via JTAG)
Lead-Free — [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing]

Datasheets & Resources

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