EPM9560RC208-16 vs EPM9560RC208-10 比較
詳細な並列比較: EPM9560RC208-16 メーカー: Intel および EPM9560RC208-10 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Intel
EPM9560RC208-16 - MAX 9000 CPLD, 560 Macrocells, 208-RQFP | Intel / Altera
EPM9560RC208-16 Nrnd仕様比較
| パラメータ | EPM9560RC208-16 | EPM9560RC208-10 |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $52.40 | $15.40 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Logic Elements / Macrocells | 560 macrocells | — |
| Typical Gates | 12,000 gates | — |
| Usable Gates | 12,000 (typical) | 12,000 |
| Pin-to-Pin Delay (tPD) | 16 ns | 10 ns |
| Maximum Internal Frequency (fMAX) | 117.6 MHz | — |
| Supply Voltage (VCCINT / VCCIO) | 5 V | — |
| User I/O Pins | 416 | — |
| パッケージ | 208-pin Power Quad Flat Pack (RQFP) | 208-pin RQFP (Plastic Quad Flat Pack) |
| 実装タイプ | Surface Mount | Surface Mount |
| Process Technology | 0.35 µm CMOS EEPROM | 0.30 µm CMOS EEPROM |
| Programmability | In-system via JTAG (IEEE 1149.1) | JTAG (IEEE 1149.1) in-system programming |
| 動作温度 | [DATA_NEEDED: industrial/commercial temperature grade] | 0C to +70C (commercial) |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: not stated in retrieved distributor listings] |
| Speed Grade | -16 | — |
| Macrocells | — | 560 |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum User I/O Pins | — | 212 (208-pin package variant) |
| Maximum Frequency (fMAX) | — | [DATA_NEEDED: internal toggle frequency in MHz] |
| Supply Voltage (VCCINT) | — | 5.0 V |
| I/O Standards Supported | — | 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O) |
| Configuration Memory | — | EEPROM (in-system programmable via JTAG) |
| Lead-Free | — | [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing] |