EPM9560RC240-10N vs EPM9560ARI240-10N Comparison

Detailed side-by-side comparison of EPM9560RC240-10N by Intel and EPM9560ARI240-10N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560RC240-10N EPM9560ARI240-10N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $168.00 $105.00
Family MAX 9000 MAX 9000
Architecture Multiple Array MatriX (MAX) - 3rd generation Multiple Array MatriX (MAX) - 3rd generation
Usable Gates 12,000 12,000
Macrocells 560 560
Logic Array Blocks (LABs) 16 16
User I/Os 212 216 (per digchip); 191 (per Mouser)
Internal Operating Frequency 144.9 MHz β€”
Pin-to-Pin Propagation Delay (tPD) 10 ns (-10 speed grade) β€”
Supply Voltage 5.0 V 5.0 V nominal (4.5 V min, 5.5 V max)
Process Technology 0.65 Β΅m CMOS EEPROM β€”
Package 240-pin RQFP (Plastic Quad Flat Pack) 240-pin RQFP (RQFP-240 / PQFP-240)
Programming Interface JTAG (IEEE 1149.1) - in-system programmable β€”
I/O Standards Supported 5.0 V TTL/CMOS, 3.3 V PCI-compatible β€”
Operating Temperature (Commercial) 0 Β°C to +70 Β°C β€”
Lead-Free Finish (N suffix) Yes (Pb-free) β€”
RoHS Status ROHS3 Compliant (per fpgalink.com listing) β€”
Moisture Sensitivity Level (MSL) 3 (168 hours) β€”
Product Type β€” CPLD (Complex Programmable Logic Device)
Maximum Internal Frequency β€” 144.9 MHz (typical); 145 MHz (per digchip)
Propagation Delay (tPD) β€” 10 ns (-10 speed grade)
Logic Family β€” CMOS, EEPROM-based
In-System Programmability β€” Yes (5.0 V ISP via JTAG)
Mounting Type β€” Surface Mount
Operating Temperature β€” -40C to +85C (industrial)
JTAG (IEEE 1149.1) β€” Yes
Lead-Free / RoHS β€” [DATA_NEEDED: lead-free / RoHS status not in provided data]

Datasheets & Resources

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