EPM9560RC240-15C vs EPM9560RC240-10 Comparison
Detailed side-by-side comparison of EPM9560RC240-15C by Intel and EPM9560RC240-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RC240-15C | EPM9560RC240-10 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $0.00 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EEPROM-based CPLD | Complex Programmable Logic Device (CPLD) |
| Usable Gates | 12,000 | 12,000 gates |
| Macrocells | 560 | β |
| Logic Array Blocks | 20 | β |
| User I/O Pins | 187 | 192 |
| Maximum Internal Frequency | 117.6 MHz | β |
| Propagation Delay (tPD) | 15 ns | β |
| Supply Voltage | 5.0 V | 5 V |
| Operating Voltage Range | 3.3 V or 5 V | β |
| Package | 240-pin RQFP (PowerQuad II) | 240-pin RQFP (PowerQuad) |
| Terminal Pitch | 0.5 mm | β |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| Configuration Technology | EEPROM (non-volatile) | β |
| In-System Programmability | Yes (ISP via JTAG) | β |
| JTAG Interface | IEEE 1149.1 boundary-scan | β |
| Process Technology | CMOS | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | ROHS3 Compliant |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| Macro Cells | β | 560 |
| Logic Array Blocks (LABs) | β | 12 |
| Maximum System Frequency | β | 144.9 MHz |
| Pin-to-Pin Propagation Delay | β | 10 ns |
| Technology | β | CMOS EEPROM |
| Moisture Sensitivity Level (MSL) | β | 3 (168 Hours) |
| Configuration Memory | β | Non-volatile EEPROM (instant-on) |
| Manufacturer Standard Lead Time | β | 1-7 Days (distributor stock) |