EPM9560RC240-15C vs EPM9560RC240-15N Comparison

Detailed side-by-side comparison of EPM9560RC240-15C by Intel and EPM9560RC240-15N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560RC240-15C EPM9560RC240-15N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $27.85
Family MAX 9000 MAX 9000 (third-generation Multiple Array MatriX)
Device Type EEPROM-based CPLD β€”
Usable Gates 12,000 12,000
Macrocells 560 560
Logic Array Blocks 20 β€”
User I/O Pins 187 β€”
Maximum Internal Frequency 117.6 MHz β€”
Propagation Delay (tPD) 15 ns β€”
Supply Voltage 5.0 V 5.0 V
Operating Voltage Range 3.3 V or 5 V β€”
Package 240-pin RQFP (PowerQuad II) RQFP-240 (240-pin Plastic Quad Flat Pack)
Terminal Pitch 0.5 mm β€”
Mounting Type Surface Mount Surface Mount
Operating Temperature 0C to +70C (Commercial) 0C to +70C (Commercial)
Configuration Technology EEPROM (non-volatile) β€”
In-System Programmability Yes (ISP via JTAG) β€”
JTAG Interface IEEE 1149.1 boundary-scan β€”
Process Technology CMOS β€”
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance - older Altera RQFP part]
MSL Level [DATA_NEEDED: MSL level] β€”
Series β€” MAX 9000
Logic Array Blocks (LABs) β€” 35
Maximum User I/O Pins β€” 216
Pin-to-Pin Propagation Delay (tPD) β€” 15 ns
Internal Counter Frequency (fCNT) β€” 145 MHz
Global Setup Time (tFSU) β€” [DATA_NEEDED: tFSU for -15 grade]
Clock-to-Output Time (tFCO) β€” [DATA_NEEDED: tFCO for -15 grade]
Logic Family β€” CMOS (EEPROM-based)
Programmability β€” In-system programmable (IEEE 1532/JTAG)
Boundary-Scan Test β€” JTAG (IEEE 1149.1)

Datasheets & Resources

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