EPM9560RC240-15C vs EPM9560RC240-15N 比較
詳細な並列比較: EPM9560RC240-15C メーカー: Intel および EPM9560RC240-15N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM9560RC240-15C | EPM9560RC240-15N |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $0.00 | $27.85 |
| Family | MAX 9000 | MAX 9000 (third-generation Multiple Array MatriX) |
| Device Type | EEPROM-based CPLD | — |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| Logic Array Blocks | 20 | — |
| User I/O Pins | 187 | — |
| Maximum Internal Frequency | 117.6 MHz | — |
| Propagation Delay (tPD) | 15 ns | — |
| 電源電圧 | 5.0 V | 5.0 V |
| Operating Voltage Range | 3.3 V or 5 V | — |
| パッケージ | 240-pin RQFP (PowerQuad II) | RQFP-240 (240-pin Plastic Quad Flat Pack) |
| Terminal Pitch | 0.5 mm | — |
| 実装タイプ | Surface Mount | Surface Mount |
| 動作温度 | 0C to +70C (Commercial) | 0C to +70C (Commercial) |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (ISP via JTAG) | — |
| JTAG Interface | IEEE 1149.1 boundary-scan | — |
| Process Technology | CMOS | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance - older Altera RQFP part] |
| MSLレベル | [DATA_NEEDED: MSL level] | — |
| Series | — | MAX 9000 |
| Logic Array Blocks (LABs) | — | 35 |
| Maximum User I/O Pins | — | 216 |
| Pin-to-Pin Propagation Delay (tPD) | — | 15 ns |
| Internal Counter Frequency (fCNT) | — | 145 MHz |
| Global Setup Time (tFSU) | — | [DATA_NEEDED: tFSU for -15 grade] |
| Clock-to-Output Time (tFCO) | — | [DATA_NEEDED: tFCO for -15 grade] |
| Logic Family | — | CMOS (EEPROM-based) |
| Programmability | — | In-system programmable (IEEE 1532/JTAG) |
| Boundary-Scan Test | — | JTAG (IEEE 1149.1) |