EPM9560RC240-15C vs EPM9560RC240-20N Comparison
Detailed side-by-side comparison of EPM9560RC240-15C by Intel and EPM9560RC240-20N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RC240-15C | EPM9560RC240-20N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $0.00 |
| Family | MAX 9000 | β |
| Device Type | EEPROM-based CPLD | β |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| Logic Array Blocks | 20 | β |
| User I/O Pins | 187 | β |
| Maximum Internal Frequency | 117.6 MHz | β |
| Propagation Delay (tPD) | 15 ns | β |
| Supply Voltage | 5.0 V | 5.0 V |
| Operating Voltage Range | 3.3 V or 5 V | β |
| Package | 240-pin RQFP (PowerQuad II) | 240-pin RQFP (PowerQuad Flat Pack) |
| Terminal Pitch | 0.5 mm | β |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0C to +70C (Commercial) | 0 C to +70 C (commercial) |
| Configuration Technology | EEPROM (non-volatile) | EEPROM (in-system programmable) |
| In-System Programmability | Yes (ISP via JTAG) | β |
| JTAG Interface | IEEE 1149.1 boundary-scan | β |
| Process Technology | CMOS | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| Device Family | β | MAX 9000 (EPM9560) |
| Logic Type | β | Complex Programmable Logic Device (CPLD) |
| Logic Array Blocks (LABs) | β | 35 |
| Maximum User I/O Pins | β | 216 |
| Pin-to-Pin Propagation Delay (tPD1) | β | 20 ns |
| Internal Counter Frequency (fCNT) | β | 144 MHz |
| Flip-Flop Setup Time (tSU) | β | 3.0 ns |
| Speed Grade | β | -20 (20 ns) |
| Lead-Free Status | β | [DATA_NEEDED: lead-free status] |