EPM9560RC304-15 vs EPM9560RC304-2 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC304-15 sa pamamagitan ng Altera at EPM9560RC304-2 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM9560RC304-15 EPM9560RC304-2
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Device Family MAX 9000 —
Architecture Multiple Array MatriX (MAX), EEPROM-based Multiple Array MatriX (MAX) - third generation
Macrocells 560 [DATA_NEEDED: macrocell count]
Logic Array Blocks (LABs) 16 16
User I/O Pins 212 (maximum) 304
Propagation Delay (tPD) 15 ns (combinatorial, pin-to-pin) —
Bilang ng Pin 304 —
Packhaging 304-pin RQFP (Plastic Quad Flat Pack) 304-pin RQFP (RC)
Supply Voltage (VCCINT) 5.0 V —
I/O Standard 5.0 V TTL / PCI-compliant —
In-System Programmability Yes, via IEEE Std. 1149.1 JTAG —
Configuration Memory On-chip EEPROM (non-volatile) On-chip EEPROM (non-volatile)
Technology Node High-performance CMOS, EEPROM process —
Temperature na Operasyon [DATA_NEEDED: industrial/commercial temperature grade] Commercial (0C to +70C)
Uri ng Pagpapasok Surface Mount Surface Mount
Tindminan RoHS [DATA_NEEDED: lead-free / RoHS compliance status] [DATA_NEEDED: RoHS compliance status]
Family — MAX 9000
Device Type — CPLD (EPLD - Erasable PLD)
Usable Gates — Approximately 12,000
Speed Grade — -2
Core Supply Voltage — 5.0 V
I/O Supply Voltage — 5.0 V
Programming Technology — EEPROM (in-system programmable)
JTAG Support — IEEE Std. 1149.1 (boundary-scan + ISP)
Lead-Free — [DATA_NEEDED: lead-free status]

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