EPM9560RC304-15F vs EPM9560RC304-15C Comparison
Detailed side-by-side comparison of EPM9560RC304-15F by Altera and EPM9560RC304-15C by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560RC304-15F - 560-Macrocell MAX 9000 CPLD, 5V, RQFP-304 | Intel
EPM9560RC304-15F ObsoleteAltera
EPM9560RC304-15C - 560 Macro Cell MAX 9000 CPLD 117.6MHz 5V | Altera
EPM9560RC304-15C ObsoleteSpecification Comparison
| Parameter | EPM9560RC304-15F | EPM9560RC304-15C |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $18.75 | $24.50 |
| Device Family | MAX 9000 | β |
| Series | EPM9560 | β |
| Macrocells | 560 | β |
| Usable Gates | 12,000 | 12,000 |
| Propagation Delay (tpd) | 16.6 ns (max) | β |
| Maximum Internal Frequency | 117.6 MHz | β |
| Core Supply Voltage | 5.0 V | β |
| User I/O Pins | 212 | β |
| Dedicated Inputs | 4 | β |
| Logic Array Blocks (LABs) | 16 (40 macrocells each) | 16 |
| Package | RQFP-304 (304-pin Plastic QFP) | 304-pin RQFP |
| Programming Technology | 5.0 V in-system EEPROM via JTAG (IEEE 1149.1) | β |
| Architecture | Multiple Array MatriX (MAX) with PIA interconnect | Multiple Array MatriX (MAX), 3rd generation |
| Boundary Scan Test (BST) | Yes, JTAG-compliant | β |
| Operating Temperature | -40C to +85C (industrial) | 0 C to +70 C (Commercial) |
| Process Technology | High-performance CMOS, EEPROM-based | CMOS EEPROM |
| Mounting Type | Surface Mount | Surface Mount |
| MSL Level | 3 (168 hours) | β |
| RoHS Status | [DATA_NEEDED: rohs status - not stated in source] | [DATA_NEEDED: RoHS status] |
| Family | β | MAX 9000 |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Macro Cells | β | 560 |
| User I/O Pins (maximum) | β | 212 |
| Maximum Operating Frequency | β | 117.6 MHz |
| Pin-to-Pin Propagation Delay (tPD) | β | 15 ns |
| Supply Voltage | β | 5.0 V |
| In-System Programmability | β | Yes (IEEE 1149.1 JTAG) |
| Program/Erase Endurance | β | 100 cycles minimum |