EPM9560RC340-15 vs EPM9560RC304-20 Comparison
Detailed side-by-side comparison of EPM9560RC340-15 by Altera and EPM9560RC304-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RC340-15 | EPM9560RC304-20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | 12,000 |
| Pin-to-Pin Delay (tPD) | 15 ns | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5.0 V nominal) | — |
| User I/O Pins | 212 | — |
| Package | 340-RQFP (Reduced Quad Flat Pack) | 304-pin RQFP |
| Mounting Type | Surface Mount | Surface Mount |
| Process Technology | CMOS EEPROM | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | — |
| Operating Temperature (Commercial) | 0C to +70C | — |
| Architecture | Multiple Array MatriX (MAX) - 3rd generation | — |
| Boundary Scan | IEEE Std. 1149.1 JTAG | — |
| Programming Technology | EEPROM (non-volatile, reprogrammable) | — |
| RoHS Status | [DATA_NEEDED: RoHS status - not explicitly stated in verified data] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Device Family | — | MAX 9000 (EPM9560) |
| User I/O Lines | — | 212 |
| Propagation Delay (tPD) | — | 20 ns |
| Maximum Operating Frequency | — | 100 MHz |
| Core Supply Voltage | — | 5.0 V |
| I/O Voltage | — | 3.3 V or 5 V (configurable) |
| Configuration Technology | — | EEPROM (in-system programmable) |
| JTAG Interface | — | IEEE Std. 1149.1 (built-in) |
| Operating Temperature | — | [DATA_NEEDED: operating temperature range] |
| Logic Array Blocks (LABs) | — | 20 |
| Speed Grade | — | -20 |
| MSL Level | — | [DATA_NEEDED: MSL level] |