EPM9560RC340-15 vs EPM9560RC304-20 Comparison

Detailed side-by-side comparison of EPM9560RC340-15 by Altera and EPM9560RC304-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560RC340-15 EPM9560RC304-20
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $24.00 $0.00
Family MAX 9000 β€”
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 560 560
Usable Gates 12,000 12,000
Pin-to-Pin Delay (tPD) 15 ns β€”
Supply Voltage (VCC) 4.75 V to 5.25 V (5.0 V nominal) β€”
User I/O Pins 212 β€”
Package 340-RQFP (Reduced Quad Flat Pack) 304-pin RQFP
Mounting Type Surface Mount Surface Mount
Process Technology CMOS EEPROM β€”
In-System Programmability Yes, via IEEE Std. 1149.1 JTAG β€”
Operating Temperature (Commercial) 0C to +70C β€”
Architecture Multiple Array MatriX (MAX) - 3rd generation β€”
Boundary Scan IEEE Std. 1149.1 JTAG β€”
Programming Technology EEPROM (non-volatile, reprogrammable) β€”
RoHS Status [DATA_NEEDED: RoHS status - not explicitly stated in verified data] [DATA_NEEDED: RoHS status]
Lead-Free [DATA_NEEDED: lead-free status] β€”
Device Family β€” MAX 9000 (EPM9560)
User I/O Lines β€” 212
Propagation Delay (tPD) β€” 20 ns
Maximum Operating Frequency β€” 100 MHz
Core Supply Voltage β€” 5.0 V
I/O Voltage β€” 3.3 V or 5 V (configurable)
Configuration Technology β€” EEPROM (in-system programmable)
JTAG Interface β€” IEEE Std. 1149.1 (built-in)
Operating Temperature β€” [DATA_NEEDED: operating temperature range]
Logic Array Blocks (LABs) β€” 20
Speed Grade β€” -20
MSL Level β€” [DATA_NEEDED: MSL level]

Datasheets & Resources

Browse All Products Create BOM Request Quote