EPM9560RI208-15 vs EPM9560RI208-10 Comparison
Detailed side-by-side comparison of EPM9560RI208-15 by Intel and EPM9560RI208-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RI208-15 | EPM9560RI208-10 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $20.10 | $67.80 |
| Family | MAX 9000 | MAX 9000 |
| Architecture | CMOS EEPROM-based Multiple Array MatriX (MAX) | β |
| Macrocells | 560 | 560 |
| Typical Usable Gates | 12,000 | β |
| User I/Os | 153 | β |
| Internal Frequency (max) | 145 MHz | β |
| Propagation Delay (tPD) | 11.4 ns (commercial); 15 ns speed grade | β |
| Logic Family | CMOS | β |
| Number of Pins | 208 | β |
| Package Code | HFQFP (Power Quad Flat Pack, gull-wing) | β |
| Package Type | RQFP-208 | β |
| Supply Voltage (VCC) | 5 V nominal (4.5 V to 5.5 V) | β |
| I/O Voltage Support | 3.3 V or 5 V multi-volt I/O | β |
| Operating Temperature | 0 Β°C to 70 Β°C (industrial grade; per package suffix R) | -40 Β°C to +85 Β°C (Industrial) |
| In-System Programmability | Yes (JTAG / IEEE 1149.1) | β |
| Boundary-Scan (JTAG) | Compliant | β |
| Configuration Memory | On-chip EEPROM (non-volatile) | EEPROM, 100 erase/program cycles |
| RoHS Status | ROHS3 Compliant | ROHS3 Compliant |
| Moisture Sensitivity Level (MSL) | 3 (168 hours) | 3 (168 Hours) |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Usable Gates | β | 12,000 |
| Logic Array Blocks (LABs) | β | [DATA_NEEDED: LAB count] |
| Pin-to-Pin Delay (tPD) | β | 10 ns |
| Maximum Counter Frequency | β | 144 MHz |
| Supply Voltage (VCCINT) | β | 5.0 V |
| User I/O Pins | β | 212 (typical for 208-RQFP package) |
| Package | β | 208-pin RQFP (Power Quad Flat Pack) |
| Mounting Type | β | Surface Mount |
| Programming Interface | β | IEEE 1149.1 (JTAG) / ISP |
| Lead Time | β | 1-7 days (per fpgalink listing) |