Intel

EPM9560RI208-20N - MAX 9000 CPLD 12K Gates 208-RQFP | Intel

MPN: EPM9560RI208-20N ✗ End of Life
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5.0 V Vdss 208-pin RQFP Package 100 MHz Speed
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Drop-in alternatives for EPM9560RI208-20N — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.

Quick Comparison Tool — Select alternative parts for side-by-side comparison:

EPM9560RI208-15N

✅ Drop-In
Altera
📦 208-pin RQFP
Altera (Intel Programmable Solutions Group) · MAX 9000 · EPLD (Erasable Programmable Logic Device) · Multiple Array MatriX (MAX), 3rd generation · CMOS EEPROM, in-system programmable · 208-pin RQFP (Ruggedized Quad Flat Pack) · 356 (per third-party catalog; see _validation_note) · 208

✓ In Stock

$19.45 / Unit

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EPM9560RI208-10N

✅ Drop-In
Altera
📦 208-pin RQFP
MAX 9000 · CPLD (Complex Programmable Logic Device) · CMOS EEPROM-based Multiple Array MatriX (MAX) · 12,000 · 560 · 12,160 · 212 · 10 ns (speed grade -10)

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$61.75 / Unit

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EPM9560RI208-15

✅ Drop-In
Intel
📦 208-pin RQFP
MAX 9000 · CMOS EEPROM-based Multiple Array MatriX (MAX) · 560 · 12,000 · 153 · 145 MHz · 11.4 ns (commercial); 15 ns speed grade · CMOS

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$20.1 / Unit

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EPM9560RI208-10

✅ Drop-In
Intel
📦 208-pin RQFP
MAX 9000 · CPLD (Complex Programmable Logic Device) · 12,000 · 560 · [DATA_NEEDED: LAB count] · 10 ns · 144 MHz · 5.0 V

✓ In Stock

$67.8 / Unit

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EPM9560RI208-20

✅ Drop-In
Intel
📦 208-pin RQFP
MAX 9000 · CPLD (Complex Programmable Logic Device) · Multiple Array MatriX (MAX) - third generation · 12,000 · 560 · 16 · 212 · 20 ns

✓ In Stock

$21.1 / Unit

View Datasheet →

EPM9560RI208-20N Maximum Ratings & Electrical Characteristics

Device Family MAX 9000
Usable Gates 12,000
Macrocells 560
Pin-to-Pin Delay 20 ns (-20 speed grade)
Counter Speed 100 MHz
Supply Voltage 5.0 V
Configuration Technology EEPROM (non-volatile)
In-System Programmability Yes, via IEEE Std. 1149.1 JTAG
Package 208-pin RQFP
Mounting Type Surface Mount
Operating Temperature Industrial (-40C to +85C)
Development Tool MAX+PLUS II
Design Entry Schematic, VHDL, Verilog HDL, AHDL
Packaging Tray
Logic Architecture Third-generation MAX (Multiple Array MatriX)
Fabrication Process Advanced CMOS

EPM9560RI208-20N 208-pin rqfp Pin Configuration Guide

Complete pinout information for EPM9560RI208-20N (208-pin rqfp package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.

208-pin rqfp package pinout diagram for EPM9560RI208-20N

No detailed pinout data available for EPM9560RI208-20N.

Refer to the datasheet for full pin configuration.

Safe Operating Area (SOA) & Thermal Characteristics

Safe Operating Area Chart Default safe operating area chart for EPM9560RI208-20N Drain-to-Source Voltage (Vds) Drain Current (Id)

No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.

Typical Applications

EPM9560RI208-20N is suitable for 6 applications: Industrial Control Glue Logic, Bus Bridging and Address Decoding, Telecommunications Line-Card Control, Test and Measurement Instrumentation, Legacy System Maintenance and Redesign, Automotive and Transportation Electronics.

🏭

Industrial Control Glue Logic

The EPM9560RI208-20N fits industrial control glue logic because its 12,000 usable gates and 560 macrocells can absorb address decoding, chip-select generation, and handshake logic that would otherwise require dozens of discrete 74-series ICs. Its industrial temperature grade of -40C to +85C and 5.0 V EEPROM-based configuration tolerate the electrical noise and temperature swings of factory-floor equipment. The device is typically placed between a microcontroller and peripheral ICs, implementing wait-state generation and bus arbitration at a 20 ns pin-to-pin delay. Unlike SRAM-based FPGAs, it needs no external configuration memory, so it boots instantly and cannot be corrupted by brownouts. The trade-off is higher static power than modern low-voltage CPLDs, but the 5 V interface simplifies level matching to legacy industrial buses.

🌐

Bus Bridging and Address Decoding

The EPM9560RI208-20N is well suited to bus bridging and address decoding because its 560 macrocells can implement wide address comparators, wait-state generators, and protocol translators between 8-bit, 16-bit, and 32-bit buses. With a 20 ns pin-to-pin delay and 100 MHz counter speed, it handles legacy 5 V bus timing without external latches. Designers commonly place it between a host processor and peripherals such as UARTs, timers, and memory devices, using the JTAG interface for in-system reprogramming during development. The EEPROM configuration retains the bridge logic across power cycles, which is critical for systems that must boot deterministically. The main trade-off is that the 5.0 V supply and RQFP package require careful power distribution and board area compared with modern 1.8 V CPLDs.

🌐

Telecommunications Line-Card Control

The EPM9560RI208-20N suits telecommunications line-card control because its 12,000 usable gates can implement channel supervision, alarm monitoring, and time-slot interchange glue logic on a single non-volatile device. The 5.0 V EEPROM-based MAX 9000 architecture is immune to configuration loss during the hot-swap and power-sequencing events common in telecom shelves, unlike SRAM FPGAs that need a configuration PROM. Its 20 ns pin-to-pin delay supports the control-path timing of E1/T1 and SONET overhead interfaces, while the 208-pin RQFP provides enough I/O for dense backplane connectors. The device is typically placed on the line card between the framer and the backplane interface, handling interrupt aggregation and register access. The trade-off is higher power than low-voltage CPLDs, requiring adequate thermal relief.

🔧

Test and Measurement Instrumentation

The EPM9560RI208-20N fits test and measurement instrumentation because its 560 macrocells can implement trigger logic, pattern generation, and acquisition sequencing with deterministic 20 ns timing. The non-volatile EEPROM configuration means the instrument boots to a known state without a configuration load, which is important for automated test equipment that must start quickly and repeatably. Designers use the JTAG interface to update trigger algorithms in the field, and the 5.0 V I/O interfaces directly with legacy instrument backplanes and analog front-end control lines. The 100 MHz counter speed supports moderate-rate event counting and timestamping. The main trade-off is that the RQFP package and 5 V supply consume more board area and power than modern alternatives, so thermal and layout planning are required.

🔧

Legacy System Maintenance and Redesign

The EPM9560RI208-20N is a key part for legacy system maintenance and redesign because it preserves the exact 208-pin RQFP footprint, 5.0 V interface, and MAX+PLUS II design flow of existing MAX 9000 designs. When an original board must be repaired or reproduced, using the same device avoids re-qualification and re-layout costs. The EEPROM configuration can be reprogrammed in-system via JTAG, so field upgrades do not require removing the part. Engineers can also migrate to faster pin-compatible grades such as the EPM9560RI208-15N or EPM9560RI208-10N if timing margins are tight. The trade-off is that the MAX 9000 family is obsolete, so long-term supply depends on residual inventory and should be managed with last-time-buy planning.

🚗

Automotive and Transportation Electronics

The EPM9560RI208-20N can serve automotive and transportation electronics where 5 V logic and non-volatile configuration are required, such as body-control modules, dashboard controllers, and legacy powertrain interfaces. Its industrial temperature grade of -40C to +85C covers many under-hood and cabin environments, and the EEPROM configuration survives the cold-crank and load-dump events that can reset SRAM-based logic. The 12,000 usable gates and 560 macrocells implement multiplexed switch inputs, lamp drivers, and CAN gateway glue logic at a 20 ns pin-to-pin delay. The device is typically placed between a vehicle network controller and discrete I/O. The trade-off is that the part is not AEC-Q100 qualified, so automotive use requires additional qualification evidence from the system integrator.

What is the EPM9560RI208-20N?
The EPM9560RI208-20N is a MAX 9000 family EEPROM-based Complex Programmable Logic Device (CPLD) from Intel (Altera) with 12,000 usable gates, 560 macrocells, and a 20 ns pin-to-pin delay in a 208-pin RQFP package. According to the Altera MAX 9000 datasheet, it operates from a 5.0 V supply and supports in-system programming via the IEEE Std. 1149.1 JTAG interface.
What is the difference between EPM9560RI208-20N and EPM9560RI208-15N?
The EPM9560RI208-20N has a 20 ns pin-to-pin delay, while the EPM9560RI208-15N is a faster -15 speed grade with a 15 ns pin-to-pin delay. Both share the same 208-pin RQFP package, 12,000 usable gates, 560 macrocells, and 5.0 V supply, making the -15N a drop-in replacement when faster timing is required. The -15N is typically higher cost.
Where to buy EPM9560RI208-20N online?
The EPM9560RI208-20N is available through authorized distributors such as DigiKey and through specialty programmable-logic suppliers. As of 2026-09-13, pricing and stock vary widely because the MAX 9000 family is obsolete; buyers should verify authenticity and request a Certificate of Conformance. XAIPART lists the part with drop-in speed-grade alternatives to simplify sourcing.
What is the price of EPM9560RI208-20N?
Pricing for the EPM9560RI208-20N is not published in the verified web data and must be obtained by quote, as of 2026-09-13. Because the MAX 9000 family is obsolete, market prices fluctuate significantly with remaining inventory. Contact distributors directly for current unit pricing and volume breaks; XAIPART provides a quote-based ordering flow for this part.
What is the lead time for EPM9560RI208-20N?
Lead time for the EPM9560RI208-20N is not specified in the verified web data and is typically stock-dependent, as of 2026-09-13. Since the MAX 9000 family is obsolete, availability comes from remaining distributor and broker inventory rather than new production. Buyers should confirm stock and request expedited shipping where available.
Is EPM9560RI208-20N in stock?
Stock status for the EPM9560RI208-20N is not confirmed in the verified web data, as of 2026-09-13. The device is obsolete, so inventory is limited to distributor and broker residual stock. Check DigiKey and specialty suppliers for real-time availability, and consider drop-in speed-grade alternatives such as the EPM9560RI208-15N if the -20N is unavailable.
What is the best drop-in replacement for EPM9560RI208-20N?
The best drop-in replacement for the EPM9560RI208-20N is the EPM9560RI208-15N, which shares the same 208-pin RQFP package, 12,000 usable gates, 560 macrocells, and 5.0 V supply, but offers a faster 15 ns pin-to-pin delay. According to the MAX 9000 datasheet, speed grades are pin-compatible, so no PCB change is required. The EPM9560RI208-10N is a further upgrade at 10 ns.
Can EPM9560RI208-15N replace EPM9560RI208-20N?
Yes, the EPM9560RI208-15N can replace the EPM9560RI208-20N because both are MAX 9000 devices in the same 208-pin RQFP package with identical pinouts and 5.0 V supply. The -15N is a faster speed grade (15 ns vs 20 ns pin-to-pin), so it meets or exceeds the original timing. Verify your design's timing closure and power budget before substituting.
What are the key specifications of EPM9560RI208-20N that engineers should know?
The EPM9560RI208-20N offers 12,000 usable gates, 560 macrocells, a 20 ns pin-to-pin delay, 100 MHz counter speed, and 5.0 V operation in a 208-pin RQFP package. It uses non-volatile EEPROM configuration with IEEE Std. 1149.1 JTAG in-system programming and is supported by the MAX+PLUS II toolchain. These figures come from the Altera MAX 9000 device family datasheet.
What is the difference between EPM9560RI208-20N and EPM9560RC208-20?
The EPM9560RI208-20N is the industrial temperature grade (-40C to +85C) in a 208-pin RQFP package, while the EPM9560RC208-20 is the commercial temperature grade (0C to +70C) in the same 208-pin RQFP package. Both share 12,000 usable gates, 560 macrocells, and a 20 ns pin-to-pin delay. Choose the RI version for industrial environments.
When should I choose EPM9560RI208-20N over EPM9560RI208-10N?
Choose the EPM9560RI208-20N when your design's timing budget allows a 20 ns pin-to-pin delay and you want the lowest-cost speed grade available. Choose the EPM9560RI208-10N when you need a 10 ns pin-to-pin delay for higher clock rates or tighter setup/hold margins. Both are pin-compatible 208-pin RQFP devices, so the decision is purely timing and cost.
Is EPM9560RI208-20N suitable for industrial applications?
Yes, the EPM9560RI208-20N is suitable for industrial applications because the RI suffix denotes the industrial temperature grade of -40C to +85C. It provides 12,000 usable gates and 560 macrocells for glue logic, bus interfacing, and state-machine control, and its 5.0 V EEPROM-based configuration is robust in electrically noisy industrial environments.
Where to download EPM9560RI208-20N datasheet PDF?
The EPM9560RI208-20N datasheet PDF is available from the Altera datasheet archive at alterasemi.com and from distributor sites such as DigiKey. The document covers the MAX 9000 device family, including architecture, timing models, pinouts, and JTAG programming details. Always download from a manufacturer or authorized-distributor source to ensure the latest revision.
Where to find EPM9560RI208-20N pinout?
The EPM9560RI208-20N pinout is documented in the MAX 9000 device family datasheet, which lists the 208-pin RQFP pin assignments, including dedicated JTAG pins (TCK, TMS, TDI, TDO), power and ground pins, and general-purpose I/O. Distributor product pages such as DigiKey also provide pinout references. Verify against the latest datasheet revision before layout.
Hey Google, what can replace EPM9560RI208-20N?
The EPM9560RI208-15N and EPM9560RI208-10N can replace the EPM9560RI208-20N. All three are MAX 9000 CPLDs in the same 208-pin RQFP package with 12,000 usable gates and 560 macrocells, differing only in speed grade (20 ns, 15 ns, and 10 ns pin-to-pin). Because they are pin-compatible, no PCB redesign is needed for a drop-in swap.
What is the best Intel equivalent for EPM9560RI208-20N?
The best Intel equivalent for the EPM9560RI208-20N is the EPM9560RI208-15N, a same-family MAX 9000 CPLD in the identical 208-pin RQFP package with a faster 15 ns pin-to-pin delay. Intel (Altera) also offers the EPM9560RI208-10N at 10 ns. All are pin-compatible, so they serve as direct Intel-brand replacements without board changes.

Engineering reference data for EPM9560RI208-20N — comparison, design guidance, and compliance information.

Selection Guide

Choose the EPM9560RI208-20N when you need a 5.0 V, non-volatile CPLD with 12,000 usable gates and 560 macrocells, and your design closes timing at a 20 ns pin-to-pin delay. It is the most economical speed grade in the 208-pin RQFP MAX 9000 family and is ideal for legacy board maintenance, industrial glue logic, and bus bridging. Choose the EPM9560RI208-15N or EPM9560RI208-10N if you need faster timing (15 ns or 10 ns) and can accept higher cost; both are pin-compatible drop-ins. Choose the EPM9560RC208-20 only if your application is commercial-temperature (0C to +70C) and cost-sensitive. Because the MAX 9000 family is obsolete, plan a last-time-buy and qualify a migration path to a modern CPLD or small FPGA for new designs.

Comparison with Alternatives

Parameter This Product EPM9560RI208-15N EPM9560RI208-10N EPM9560RI208-20
Package 208-pin RQFP 208-pin RQFP - same 208-pin RQFP - same 208-pin RQFP - same
Brand Intel Intel Intel Intel
Pin-to-Pin Delay 20 ns 15 ns 10 ns 20 ns
Usable Gates 12,000 12,000 12,000 12,000
Macrocells 560 560 560 560
Supply Voltage 5.0 V 5.0 V 5.0 V 5.0 V
Counter Speed 100 MHz [DATA_NEEDED] [DATA_NEEDED] 100 MHz
Temperature Grade Industrial (-40C to +85C) Industrial (-40C to +85C) Industrial (-40C to +85C) Industrial (-40C to +85C)
Configuration Technology EEPROM (non-volatile) EEPROM (non-volatile) EEPROM (non-volatile) EEPROM (non-volatile)
JTAG ISP Yes (IEEE Std. 1149.1) Yes (IEEE Std. 1149.1) Yes (IEEE Std. 1149.1) Yes (IEEE Std. 1149.1)

Key Differentiators

  • Non-volatile EEPROM configuration (vs SRAM-based FPGAs)
  • Pin-compatible speed-grade upgrade path (vs EPM9560RI208-15N)
  • 5.0 V interface compatibility (vs EPM9560RI208-10N)
  • Industrial temperature grade (vs EPM9560RC208-20)

Design Notes

The EPM9560RI208-20N requires a well-regulated 5.0 V supply with adequate decoupling. Place at least one 0.1 uF ceramic capacitor per power pin pair as close to the device as possible, plus bulk 10 uF to 47 uF capacitors near the package corners. Estimated: at a typical 5 V CPLD operating current of a few hundred milliamps, a 100 mV supply droop corresponds to roughly 0.5 W of additional dissipation in the regulator, so verify the regulator's thermal margin. Follow the MAX 9000 datasheet power-supply recommendations for decoupling network values.

The 208-pin RQFP package requires careful PCB layout to avoid solder-joint defects. Use a solder-mask-defined pad geometry per the datasheet land pattern, provide thermal relief on ground pins, and keep the exposed copper balanced to prevent package warping during reflow. Route JTAG signals (TCK, TMS, TDI, TDO) as short, controlled-impedance traces and keep them away from high-speed switching nodes. Provide test points for all JTAG pins to support in-system programming and boundary-scan test.

A common pitfall with the EPM9560RI208-20N is assuming SRAM-FPGA-like configuration behavior. Because the MAX 9000 uses EEPROM cells, the device retains its design without a configuration PROM, but it must still be programmed before first use. Ensure the JTAG chain is correctly terminated and that the programming file targets the -20 speed grade; using a -15 or -10 timing model can cause over-constraining or under-constraining of the fitter. Also verify that the obsolete lifecycle status is reflected in your last-time-buy and obsolescence plan.

Compliance Information

RoHS
Unknown
REACH
Unknown
AEC-Q100
Not Qualified
Lead Free
Unknown
Halogen Free
Unknown
Conflict Minerals
Unknown

Compliance data for the EPM9560RI208-20N was not present in the verified web data. The device is obsolete and predates current RoHS/REACH documentation practices; confirm compliance with the distributor or manufacturer before use in regulated markets.

Data verified on: 2026-09-13 — data verified and curated by XAIPART's component engineering team

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Related Components & Terms

Intel Altera EPM9560RI208-20N EPM9560RI208-15N EPM9560RI208-10N MAX 9000 CPLD Complex Programmable Logic Device programmable logic device EEPROM IEEE Std. 1149.1 JTAG 208-pin RQFP RQFP surface mount MAX+PLUS II VHDL Verilog HDL AHDL macrocell pin-to-pin delay industrial temperature grade glue logic bus bridging
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