K4S561633F-ZL75 vs K4S561633FZN75 Comparison
Detailed side-by-side comparison of K4S561633F-ZL75 by Samsung Electronics and K4S561633FZN75 by Samsung Electronics. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Samsung Electronics
K4S561633F-ZL75 - 256Mb Mobile SDRAM, 4x16Mx16, 133MHz, 54-BGA
K4S561633F-ZL75 NrndSamsung Electronics
K4S561633FZN75 - 256Mb Mobile SDRAM 4x16Mx16 133MHz FBGA | Samsung
K4S561633FZN75 NrndSpecification Comparison
| Parameter | K4S561633F-ZL75 | K4S561633FZN75 |
|---|---|---|
| Brand | Samsung Electronics | Samsung Electronics |
| Category | Memory ICs | Memory ICs |
| Lifecycle Status | NRND | NRND |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $2.50 | $2.52 |
| Memory Type | Synchronous DRAM (Mobile SDRAM) | Mobile SDRAM (Synchronous DRAM) |
| Density | 256 Mbit (268,435,456 bits) | 256 Mbit (268,435,456 bits) |
| Organization | 4 banks x 4,196,304 words x 16 bits (4M x 16 x 4 banks) | 4 banks x 4,196,304 words x 16 bits |
| Operating Frequency (max) | 133 MHz | — |
| Clock Access Time | 5.4 ns | — |
| Speed Grade | ZL75 (7.5 ns / CAS Latency 3, 133 MHz) | — |
| Supply Voltage (VDD) | 3.3 V | — |
| I/O Standard | LVCMOS-compatible | — |
| Number of Banks | 4 | — |
| Burst Length | 1, 2, 4, 8, Full Page | 1, 2, 4, 8, full page (programmable) |
| Burst Type | Sequential or Interleave | — |
| CAS Latency | Programmable, 2 or 3 | Programmable, 2 or 3 |
| Package | 54-ball FBGA (54-BOC) / TFBGA | 54-ball FBGA (54BOC) |
| Mounting Type | Surface Mount | — |
| RoHS / Lead-Free | Pb-Free (per -L75 suffix) | — |
| Operating Temperature | [DATA_NEEDED: operating temperature grade] | Commercial grade (per -ZN75 suffix) |
| Clock Frequency | — | 133 MHz |
| Data Rate | — | PC133 (SDRAM) |
| Supply Voltage (VDD/VDDQ) | — | 3.0 V (typ); 2.7 V-3.3 V range |
| Interface | — | LVCMOS |
| Process Technology | — | Samsung high-performance CMOS |
| Refresh | — | Auto-Refresh and Self-Refresh |
| Power Modes | — | Power-Down mode, Partial Array Self-Refresh (PASR) |
| Lead-Free / RoHS | — | Pb-free (lead-free) - per '-ZN' suffix |
| Bank Architecture | — | 4 internal banks |
| Row Address | — | A0-A12 (13-bit) |
| Data Width | — | x16 (DQ0-DQ15) |