RTAX1000S-1LG624V vs RTAX1000SL-LG624E Comparison

Detailed side-by-side comparison of RTAX1000S-1LG624V by Microchip Technology and RTAX1000SL-LG624E by Microchip Technology. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Microchip Technology
RTAX1000S-1LG624V RTAX1000S-1LG624V - 1M-Gate Rad-Tolerant FPGA | Microchip

RTAX1000S-1LG624V - 1M-Gate Rad-Tolerant FPGA | Microchip

RTAX1000S-1LG624V ✓ Active
Microchip Technology
RTAX1000SL-LG624E RTAX1000SL-LG624E - 1M-Gate Rad-Tolerant FPGA 624-LGA | Microchip

RTAX1000SL-LG624E - 1M-Gate Rad-Tolerant FPGA 624-LGA | Microchip

RTAX1000SL-LG624E ✓ Active

Specification Comparison

Parameter RTAX1000S-1LG624V RTAX1000SL-LG624E
Brand Microchip Technology Microchip Technology
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $3,600.00 $0.00
Equivalent System Gates 1000000 1,000,000
Logic Cells 18144 —
CLBs 12096 —
Maximum User I/Os 418 —
Embedded Memory Up to 540 kbits SRAM with optional EDAC —
Technology CMOS antifuse (one-time programmable) —
Total Ionizing Dose (Functional) 300 krad (Si) —
Total Ionizing Dose (Parametric) 200 krad (Si) —
SEU Rate Less than 1E-10 errors per bit-day —
Combinatorial Delay (max) 0.93 ns —
Speed Grade -1 —
Package LG624 (624-ball ceramic column grid array) 624-Pin LGA (CBGA624), Ceramic
Configuration Nonvolatile, live at power-up, single chip Live-at-power-up (no external configuration device)
Radiation Tolerance Class Rad-tolerant (space flight) —
Architecture Family RTAX-S (based on Axcelerator) —
Mounting Type Surface Mount Surface Mount
Screening [DATA_NEEDED: screening flow per order code suffix] —
Supply Voltage (Core) [DATA_NEEDED: core supply voltage] —
Operating Temperature [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Family — RTAX-SL Radiation-Tolerant FPGA
ASIC Gates — 125,000
Logic Cells (CLBs) — 12,096
Maximum Combinatorial Delay per CLB — 0.93 ns
Maximum Frequency — 581 MHz
Process Technology — 0.15 um CMOS
Core Supply Voltage — 1.5 V
Packaging — Box
Technology Base — CMOS, Antifuse
I/O Voltage Range — [DATA_NEEDED: I/O voltage range]
TID Rating — [DATA_NEEDED: total ionizing dose rating]
SEU Immunity — [DATA_NEEDED: single-event upset immunity figure]

Datasheets & Resources

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