RTAX1000SL-CGS624E vs RTAX1000SL-1CGS624V Comparison
Detailed side-by-side comparison of RTAX1000SL-CGS624E by Microchip Technology and RTAX1000SL-1CGS624V by Microchip Technology. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Microchip Technology
RTAX1000SL-CGS624E - 1M-Gate Rad-Tolerant FPGA CCGA-624 | Microchip
RTAX1000SL-CGS624E ✓ ActiveMicrochip Technology
RTAX1000SL-1CGS624V - 1M-Gate Rad-Tolerant FPGA | Microchip
RTAX1000SL-1CGS624V ✓ ActiveSpecification Comparison
| Parameter | RTAX1000SL-CGS624E | RTAX1000SL-1CGS624V |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $3,970.00 | $1.00 |
| Equivalent System Gates | 1000000 gates | — |
| Additional ASIC Gates | 125000 gates | — |
| Configurable Logic Blocks (CLBs) | 12096 | — |
| Maximum System Frequency | 581 MHz | — |
| Process Technology | 0.15 um CMOS | — |
| Core Supply Voltage | 1.5 V | — |
| Family | RTAX-S/SL Radiation-Tolerant FPGA | — |
| Package | 624-ball Ceramic Column Grid Array (CGS624) | — |
| Radiation Tolerance | Radiation-tolerant (space-flight qualified family) | Radiation-tolerant (space-flight qualified family) |
| Configuration | Non-volatile anti-fuse, live-at-power-up, single chip | Live at power-up, single chip, no external boot PROM |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| Clocking Features | Segmentable clocks, chip-wide highway routing | — |
| Arithmetic Support | Dedicated carry logic | — |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | [DATA_NEEDED: Operating Temperature] | -55C to +125C |
| I/O Count | [DATA_NEEDED: User I/O Count] | — |
| RoHS Status | [DATA_NEEDED: RoHS Status] | [DATA_NEEDED: RoHS status] |
| System Gates | — | 1,000,000 (1.00E6) |
| Logic Cells / Logic Blocks | — | 12096 |
| Logic Family | — | Digital CMOS |
| Programmable Technology | — | Antifuse (one-time programmable) |
| Package Type | — | CGA-624 (ceramic column grid array) |
| Pin Count | — | 624 |
| Speed Grade | — | -1 (standard) |
| SEU Immunity | — | SEU-hardened registers; SEU rate < 10-10 errors/bit-day |
| Clocking | — | Segmentable clock resources |
| Routing Features | — | Chip-wide highway routing, carry logic |
| Supply Voltage | — | [DATA_NEEDED: core/IO supply voltage] |