RTAX2000S-1CGS624V vs RTAX2000S-CGS624V Comparison

Detailed side-by-side comparison of RTAX2000S-1CGS624V by Microchip Technology and RTAX2000S-CGS624V by Microchip Technology. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Microchip Technology
RTAX2000S-1CGS624V RTAX2000S-1CGS624V - 2M-Gate Rad-Tolerant FPGA | Microchip

RTAX2000S-1CGS624V - 2M-Gate Rad-Tolerant FPGA | Microchip

RTAX2000S-1CGS624V ✓ Active
Microchip Technology
RTAX2000S-CGS624V RTAX2000S-CGS624V - 2M-Gate Rad-Tolerant FPGA CG624 | Microchip

RTAX2000S-CGS624V - 2M-Gate Rad-Tolerant FPGA CG624 | Microchip

RTAX2000S-CGS624V ✓ Active

Specification Comparison

Parameter RTAX2000S-1CGS624V RTAX2000S-CGS624V
Brand Microchip Technology Microchip Technology
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $3,950.00 $0.00
Family RTAX-S Radiation-Tolerant FPGA RTAX-S/SL Radiation-Tolerant FPGA
Equivalent System Gates 2,000,000 2000000
Configurable Logic Blocks (CLBs) 21,504 21504
Total Logic Cells 32,256 —
ASIC Gate Capacity (companion) 250,000 gates —
Core Supply Voltage (nominal) 1.5 V —
Core Supply Voltage Range 1.425 V to 1.575 V 1.425 V to 1.575 V
Logic Family CMOS —
Speed Grade -1 —
Operating Temperature -55C to +125C -55C to +125C
Package CG624 Ceramic Column Grid Array (CCGA), 624 balls CG624 ceramic column grid array
Mounting Type Surface Mount Surface Mount
Programming Technology Antifuse (one-time programmable) —
SEU Hardening SEU-hardened registers, immune to single-event upsets —
Embedded Memory Embedded SRAM with built-in FIFO control logic Embedded SRAM with built-in FIFO control logic
Configuration Live at power-up, single-chip (no external config device) —
RoHS Status [DATA_NEEDED: RoHS status] —
Weight [DATA_NEEDED: package weight] —
Logic Cells — 32256
Technology — Digital CMOS, anti-fuse OTP
Core Supply Voltage (Nominal) — 1.5 V
Configuration Type — One-Time Programmable (anti-fuse), live at power-up
Clocking — Segmentable clocks
Routing Features — Chip-wide highway routing, carry logic
Application Domain — Space-flight systems
Max Family Density — 4000000 equivalent system gates (family max)

Datasheets & Resources

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