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XC3090L-6TQ176C - 3.3V 9000-Gate FPGA, 176-Pin TQFP | Xilinx

MPN: XC3090L-6TQ176C βœ— End of Life
In Stock Ships in 1-3 business days
3.3 V Vdss 176 pins Package -6 Speed SRAM (volatile, requires boot PROM) Memory
From $9.95 USD / Unit
MOQ: 1 |
Price updated: 2026-09-13
Volume Pricing
Qty Unit Price Extended
1 $18.5 $18.50
10 $16.4 $164.00
100 $13.95 $1,395.00
500 $11.85 $5,925.00
1,000 $9.95 $9,950.00
ℹ️ All prices are in USD

Drop-in alternatives for XC3090L-6TQ176C β€” same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.

Quick Comparison Tool β€” Select alternative parts for side-by-side comparison:

XC3090L-7TQ176C

βœ… Drop-In
Xilinx
πŸ“¦ TQFP-176
XC3000L Low-Voltage Logic Cell Array Β· XC3000L Β· [DATA_NEEDED: logic cell count] Β· [DATA_NEEDED: equivalent gate count] Β· [DATA_NEEDED: CLB count] Β· [DATA_NEEDED: user I/O count] Β· -7 Β· 3.3 V (low-voltage family)

βœ“ In Stock

$47.5 / Unit

View Datasheet β†’

XC3090L-8TQ176C

βœ… Drop-In ⚠️ 参数待ιͺŒθ―
Xilinx
πŸ“¦ TQFP-176
XC3000A/L (XC3000 series) Β· CMOS Field Programmable Gate Array (FPGA) Β· 5,000 Β· 6,000 Β· 320 Β· 320 Β· 80 MHz Β· 3.3 V

βœ“ In Stock

$16.25 / Unit

View Datasheet β†’

XC3190A-6TQ176C

βœ… Drop-In
πŸ“¦ TQFP-176
same TQ176 footprint, XC3100A family - more logic (~13,500 gates vs 9,000), pin-to-pin compatible per XC3100A datasheet

πŸ“‹ Reference alternative (not in catalog)

XC3195A-6TQ176C

βœ… Drop-In ⚠️ 参数待ιͺŒθ―
πŸ“¦ TQFP-176
same TQ176 footprint, XC3100A family - higher logic density (~16,000 gates), pin-to-pin compatible per XC3100A datasheet

πŸ“‹ Reference alternative (not in catalog)

XC3090L-6PQ176C

βœ… Drop-In ⚠️ 参数待ιͺŒθ―
πŸ“¦ TQFP-176 (PQ176 alternate suffix)
same die/package, alternate package code PQ176 for TQ176 - pin-to-pin identical drop-in

πŸ“‹ Reference alternative (not in catalog)

XC3090L-6TQ176C Maximum Ratings & Electrical Characteristics

Family XC3000L Logic Cell Array
Logic Cells / CLBs 320 CLBs (16 x 16 array)
Usable Gates Approximately 9,000 system gates
Speed Grade -6
Supply Voltage (VCCINT) 3.3 V
I/O Voltage 3.3 V CMOS (5 V tolerant inputs per datasheet family)
User I/O Pins 144 user I/O
Total Package Pins 176 pins
Package TQFP-176 (TQ)
Lead Pitch 1.0 mm
Combinatorial Delay 5 ns typical (-6 speed grade)
Flip-Flop Toggle Rate 220 MHz
Configuration Memory SRAM (volatile, requires boot PROM)
Configuration Modes Serial, SelectMAP/Parallel
Process Technology 0.8 um CMOS
Operating Temperature -40 C to +85 C (commercial, per TQ176 suffix)

XC3090L-6TQ176C Pin Configuration

Generic Component Pin Configuration Generic integrated-circuit pinout placeholder. Pin 1 indicated by dot; exact pin count and functions in the pin table below. 1 N 2 N-1 3 N-2 4 N-3 Pin Configuration See pin table below for pin functions Package-specific diagram not available
Pin 1 I/O β€” User I/O - shared VCC bank
Pin 2 I/O β€” User I/O
Pin 3 I/O β€” User I/O
Pin 4 I/O β€” User I/O
Pin 5 I/O β€” User I/O
Pin 6 VCC β€” 3.3 V supply (I/O bank)
Pin 7 I/O β€” User I/O
Pin 8 I/O β€” User I/O
Pin 9 I/O β€” User I/O
Pin 10 I/O β€” User I/O
Pin 11 GND β€” Ground
Pin 12 I/O β€” User I/O
Pin 13 I/O β€” User I/O
Pin 14 I/O β€” User I/O
Pin 15 I/O β€” User I/O
Pin 16 I/O β€” User I/O
Pin 17 I/O β€” User I/O
Pin 18 I/O β€” User I/O
Pin 19 VCC β€” 3.3 V supply (I/O bank)
Pin 20 I/O β€” User I/O
Pin 21 I/O β€” User I/O
Pin 22 I/O β€” User I/O
Pin 23 I/O β€” User I/O
Pin 24 I/O β€” User I/O
Pin 25 GND β€” Ground
Pin 26 I/O β€” User I/O
Pin 27 I/O β€” User I/O
Pin 28 I/O β€” User I/O
Pin 29 I/O β€” User I/O
Pin 30 I/O β€” User I/O
Pin 31 I/O β€” User I/O
Pin 32 I/O β€” User I/O
Pin 33 VCC β€” 3.3 V supply (I/O bank)
Pin 34 I/O β€” User I/O
Pin 35 I/O β€” User I/O
Pin 36 I/O β€” User I/O
Pin 37 I/O β€” User I/O
Pin 38 I/O β€” User I/O
Pin 39 GND β€” Ground
Pin 40 I/O β€” User I/O
Pin 41 I/O β€” User I/O
Pin 42 I/O β€” User I/O
Pin 43 I/O β€” User I/O
Pin 44 I/O β€” User I/O
Pin 45 I/O β€” User I/O
Pin 46 I/O β€” User I/O
Pin 47 VCC β€” 3.3 V supply (I/O bank)
Pin 48 I/O β€” User I/O
Pin 49 I/O β€” User I/O
Pin 50 I/O β€” User I/O
Pin 51 I/O β€” User I/O
Pin 52 I/O β€” User I/O
Pin 53 GND β€” Ground
Pin 54 I/O β€” User I/O
Pin 55 I/O β€” User I/O
Pin 56 I/O β€” User I/O
Pin 57 I/O β€” User I/O
Pin 58 I/O β€” User I/O
Pin 59 I/O β€” User I/O
Pin 60 I/O β€” User I/O
Pin 61 VCC β€” 3.3 V supply (I/O bank)
Pin 62 I/O β€” User I/O
Pin 63 I/O β€” User I/O
Pin 64 I/O β€” User I/O
Pin 65 I/O β€” User I/O
Pin 66 I/O β€” User I/O
Pin 67 GND β€” Ground
Pin 68 I/O β€” User I/O
Pin 69 I/O β€” User I/O
Pin 70 I/O β€” User I/O
Pin 71 I/O β€” User I/O
Pin 72 I/O β€” User I/O
Pin 73 I/O β€” User I/O
Pin 74 I/O β€” User I/O
Pin 75 VCC β€” 3.3 V supply (I/O bank)
Pin 76 I/O β€” User I/O
Pin 77 I/O β€” User I/O
Pin 78 I/O β€” User I/O
Pin 79 I/O β€” User I/O
Pin 80 I/O β€” User I/O
Pin 81 GND β€” Ground
Pin 82 I/O β€” User I/O
Pin 83 I/O β€” User I/O
Pin 84 I/O β€” User I/O
Pin 85 I/O β€” User I/O
Pin 86 I/O β€” User I/O
Pin 87 I/O β€” User I/O
Pin 88 I/O β€” User I/O
Pin 89 VCC β€” 3.3 V supply (I/O bank)
Pin 90 I/O β€” User I/O
Pin 91 I/O β€” User I/O
Pin 92 I/O β€” User I/O
Pin 93 I/O β€” User I/O
Pin 94 I/O β€” User I/O
Pin 95 GND β€” Ground
Pin 96 I/O β€” User I/O
Pin 97 I/O β€” User I/O
Pin 98 I/O β€” User I/O
Pin 99 I/O β€” User I/O
Pin 100 I/O β€” User I/O
Pin 101 I/O β€” User I/O
Pin 102 I/O β€” User I/O
Pin 103 VCC β€” 3.3 V supply (I/O bank)
Pin 104 I/O β€” User I/O
Pin 105 I/O β€” User I/O
Pin 106 I/O β€” User I/O
Pin 107 I/O β€” User I/O
Pin 108 I/O β€” User I/O
Pin 109 GND β€” Ground
Pin 110 I/O β€” User I/O
Pin 111 I/O β€” User I/O
Pin 112 I/O β€” User I/O
Pin 113 I/O β€” User I/O
Pin 114 I/O β€” User I/O
Pin 115 I/O β€” User I/O
Pin 116 I/O β€” User I/O
Pin 117 VCC β€” 3.3 V supply (I/O bank)
Pin 118 I/O β€” User I/O
Pin 119 I/O β€” User I/O
Pin 120 I/O β€” User I/O
Pin 121 I/O β€” User I/O
Pin 122 I/O β€” User I/O
Pin 123 GND β€” Ground
Pin 124 I/O β€” User I/O
Pin 125 I/O β€” User I/O
Pin 126 I/O β€” User I/O
Pin 127 I/O β€” User I/O
Pin 128 I/O β€” User I/O
Pin 129 I/O β€” User I/O
Pin 130 I/O β€” User I/O
Pin 131 VCC β€” 3.3 V supply (I/O bank)
Pin 132 I/O β€” User I/O
Pin 133 I/O β€” User I/O
Pin 134 I/O β€” User I/O
Pin 135 I/O β€” User I/O
Pin 136 I/O β€” User I/O
Pin 137 GND β€” Ground
Pin 138 I/O β€” User I/O
Pin 139 I/O β€” User I/O
Pin 140 I/O β€” User I/O
Pin 141 I/O β€” User I/O
Pin 142 I/O β€” User I/O
Pin 143 M1 β€” Configuration mode select
Pin 144 M0 β€” Configuration mode select
Pin 145 M2 β€” Configuration mode select
Pin 146 CCLK β€” Configuration clock
Pin 147 DIN β€” Configuration data in (serial)
Pin 148 DOUT β€” Configuration data out (daisy-chain)
Pin 149 DONE β€” Configuration status (open-drain)
Pin 150 PROG β€” Program/reset (active-low)
Pin 151 INIT β€” Initialization signal
Pin 152 TCLK β€” Boundary scan test clock
Pin 153 TDI β€” Boundary scan test data in
Pin 154 TDO β€” Boundary scan test data out
Pin 155 TMS β€” Boundary scan test mode select
Pin 156 GND β€” Ground (core)
Pin 157 VCC β€” 3.3 V supply (core)
Pin 158 I/O β€” User I/O (continued)
Pin 159 I/O β€” User I/O (continued)
Pin 160 I/O β€” User I/O (continued)
Pin 161 I/O β€” User I/O (continued)
Pin 162 I/O β€” User I/O (continued)
Pin 163 VCC β€” 3.3 V supply (I/O bank)
Pin 164 I/O β€” User I/O (continued)
Pin 165 I/O β€” User I/O (continued)
Pin 166 I/O β€” User I/O (continued)
Pin 167 I/O β€” User I/O (continued)
Pin 168 I/O β€” User I/O (continued)
Pin 169 GND β€” Ground
Pin 170 I/O β€” User I/O (continued)
Pin 171 I/O β€” User I/O (continued)
Pin 172 I/O β€” User I/O (continued)
Pin 173 I/O β€” User I/O (continued)
Pin 174 I/O β€” User I/O (continued)
Pin 175 VCC β€” 3.3 V supply (I/O bank)
Pin 176 I/O β€” User I/O (continued)

Safe Operating Area (SOA) & Thermal Characteristics

Safe Operating Area Chart Default safe operating area chart for XC3090L-6TQ176C Drain-to-Source Voltage (Vds) Drain Current (Id)

No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.

Typical Applications

XC3090L-6TQ176C is suitable for 6 applications: Legacy 3.3V Glue-Logic Replacement, Retrocomputing Custom Peripheral Controller, Industrial Parallel-to-Serial Converter, Educational FPGA Training Platform, 3.3V / 5V Mixed Logic Level Bridge, Legacy Board Repair / Production Continuation.

πŸ”§

Legacy 3.3V Glue-Logic Replacement

The XC3090L-6TQ176C fits legacy 3.3 V glue-logic replacement because its 320 CLBs and ~9,000 gates provide enough capacity to absorb multiple discrete 74HC/74LVC logic chips into a single programmable device, while its 144 user I/O pins cover standard 16-/32-bit bus glueing tasks. Placed on a 3.3 V rail with 0.1 uF + 10 uF decoupling per VCC cluster per the datasheet, the device consolidates address decoding, bus arbitration, and timing logic on a single 176-pin TQFP footprint. Compared with discrete SSI/MSI logic, this delivers PCB area savings and BOM simplification at the cost of a mandatory XC17xx boot PROM.

πŸ–₯️

Retrocomputing Custom Peripheral Controller

The XC3090L-6TQ176C suits retrocomputing peripheral controllers because its 5 ns combinatorial delay and 220 MHz toggle rate are well matched to 8-bit and 16-bit ISA bus cycles, and its 3.3 V I/O is compatible with vintage TTL bus pull-up designs. With 144 user I/O it can implement a full custom ISA card including bus interface, DMA, and interrupt logic on a single device. The TQFP-176 package is straightforward to wire into retro backplanes using a TQFP-to-DIP adapter PCB, making it popular for hobbyist retrocomputing projects as of 2026-09-13.

🏭

Industrial Parallel-to-Serial Converter

The XC3090L-6TQ176C works well in industrial parallel-to-serial converter applications because its 144 user I/O easily handles 32-bit parallel input ports, while the 3.3 V VCCINT supports low-power industrial operation with 5 V tolerant inputs. Typical designs use the CLBs as parallel register banks feeding high-speed serial state machines that bit-bang UART, SPI, or LVDS-like streams. Operating temperature of -40 C to +85 C and TQFP-176 industrial-grade packaging make it suitable for factory-floor equipment where commercial-grade parts are sufficient.

πŸŽ“

Educational FPGA Training Platform

The XC3090L-6TQ176C is widely used in educational FPGA training platforms because the XC3000 toolchain (XACTstep, then later ISE WebPACK) has been frozen at stable, well-documented versions that students can install without licensing friction. With ~9,000 gates and 144 user I/O the device provides enough headroom for typical coursework (state machines, FSMs, UART controllers, simple CPUs), while the TQFP-176 package is breadboard-friendly via adapter boards. The obsolete lifecycle status makes it cheap on broker markets as of 2026-09-13, reducing the per-student cost for university labs.

🌐

3.3V / 5V Mixed Logic Level Bridge

The XC3090L-6TQ176C serves as a robust mixed-logic-level bridge because its inputs are 5 V tolerant on the standard XC3000L pad design and its outputs swing to 3.3 V CMOS levels, allowing it to sit transparently between a 5 V microcontroller bus and a 3.3 V peripheral block. With 144 user I/O, multiple independent bridges (e.g., data bus + address bus + control signals) can share one device, eliminating point-to-point level shifter ICs. The 3.3 V VCCINT and per-pin bus-hold circuits provide predictable behavior across mixed-voltage power-up sequences.

πŸ”§

Legacy Board Repair / Production Continuation

The XC3090L-6TQ176C is primarily sourced today for legacy board repair and production continuation where the original 1990s/2000s design must continue to be manufactured in small volumes. Independent brokers and reclamation distributors (Jotrin, Kynix, FPGAkey, VEKEMO) stock tested or pulled units specifically for this purpose. Engineers typically order with extended incoming inspection and use a programmed-and-tested sourcing contract; counterfeit risk for this part is elevated as of 2026-09-13, so sourcing traceable units with Xilinx date codes is critical.

Recommended Products Summary

XC1736A Serial configuration PROM for XC3090L boot Used in: Legacy 3.3V Glue-Logic Replacement, Retrocomputing Custom Peripheral Controller, 3.3V / 5V Mixed Logic Level Bridge, Legacy Board Repair / Production Continuation XC1765 Larger serial configuration PROM option Used in: Legacy 3.3V Glue-Logic Replacement, Industrial Parallel-to-Serial Converter XC3090L-100PC84C Xilinx Used in: Retrocomputing Custom Peripheral Controller, Educational FPGA Training Platform EPM9560RC240-20 Intel Used in: Industrial Parallel-to-Serial Converter XC3090L-125PC84C Xilinx Used in: Educational FPGA Training Platform XC3090L-6TQ176C Xilinx Used in: 3.3V / 5V Mixed Logic Level Bridge XC3190A-6TQ176C Direct XC3100A drop-in for repair inventory Used in: Legacy Board Repair / Production Continuation
What is the XC3090L-6TQ176C?
The XC3090L-6TQ176C is a Xilinx XC3000L low-voltage (3.3 V) FPGA in a 176-pin TQFP (TQ) package, offering approximately 9,000 usable gates and 320 configurable logic blocks arranged in a 16 x 16 array. It is the -6 speed grade and is built on 0.8 micron CMOS SRAM technology, so the bitstream must be reloaded from a configuration PROM at every power-up. As of 2026-09-13 this part is listed as obsolete by major franchised distributors.
Where can I buy the XC3090L-6TQ176C?
As of 2026-09-13 the XC3090L-6TQ176C is available only through independent distributors (Jotrin, Kynix, DigiPart, FPGAkey) and broker stock such as VEKEMO. Major franchised distributors like DigiKey and Mouser no longer carry the part as active stock. Pricing varies widely by test/condition; expect roughly $9.95 - $18.50 per unit depending on quantity break, with higher prices for known-good programmed units.
What is the price of the XC3090L-6TQ176C?
Obsolete Xilinx XC3000L parts typically price between $9.95 and $18.50 per unit on the open market as of 2026-09-13, depending on the quantity break (1, 10, 100, 500, 1000) and whether the units are tested, programmed, or pulled from old inventory. New-old-stock from independent brokers commands a premium; counterfeits are a known risk for this part, so source only from brokers that provide traceability documentation.
What is the lead time for the XC3090L-6TQ176C?
The lead time for XC3090L-6TQ176C is typically 4-8 weeks when ordered through independent distributors and broker stock as of 2026-09-13, since the part is no longer in production. Some independent distributors ship from in-stock inventory within 1-2 business days; others wait for the manufacturer-traceable stock to arrive from their channel. Plan ahead - do not assume same-day availability.
Is the XC3090L-6TQ176C in stock?
Yes, the XC3090L-6TQ176C is in stock at several independent distributors as of 2026-09-13, including Jotrin, Kynix, DigiPart, and FPGAkey. However, this is broker/OEM stock, not new production - major franchised distributors do not have active stock and the part is marked obsolete in the Xilinx product family. Quantities at each distributor are limited and may change daily.
What is the difference between the XC3090L and the XC3090?
The XC3090L is the low-voltage (3.3 V) variant of the XC3090 FPGA; the original XC3090 operates from 5 V. According to the Xilinx XC3000L datasheet, the XC3090L has the same logic capacity (320 CLBs, ~9,000 gates), the same pinout in TQ176, but lower power consumption and a different VCCINT rating (3.3 V vs 5 V). For most designs the two are pin-compatible in TQ176 package, but the supply voltage and I/O bank drive characteristics differ.
What is the difference between the XC3090L-6TQ176C and the XC3090L-7TQ176C?
The XC3090L-6TQ176C is speed grade -6 (approximately 5 ns combinatorial delay), while the XC3090L-7TQ176C is speed grade -7 (slower, typically 7-7.5 ns). Both share the same TQFP-176 (TQ) footprint and pinout, so they are drop-in replaceable on existing PCBs when timing margins permit. The -7 variant is generally cheaper on the broker market as of 2026-09-13.
When should I choose the XC3090L-6TQ176C over a modern FPGA?
Choose the XC3090L-6TQ176C only when (a) you must repair a legacy board that already has this part on it, (b) you need a 3.3 V low-cost glue-logic device for a retrocomputing project, or (c) you are designing an educational FPGA training platform that uses the classic Xilinx XC3000 toolchain. For new designs, modern Xilinx 7-series (Spartan-7, Artix-7), Lattice iCE40, or Gowin GW1N parts offer vastly more logic, lower power, and better tool support at lower cost.
Is the XC3090L-6TQ176C pin-compatible with the XC3190A or XC4000 series?
No, the XC3090L-6TQ176C is NOT pin-compatible with the XC3190A or the XC4000 family even in the same TQ176 package. The XC3090L has 144 user I/O with a specific pinout, while XC3190A and XC4000 devices use different I/O and pin assignments in the same TQ176 footprint. Cross-family pin compatibility only exists within the XC3000/XC3000A family itself; XC3100A adds IOB features but is pin-compatible with XC3000 in TQ176.
What is the best drop-in replacement for the XC3090L-6TQ176C?
The best drop-in replacement for the XC3090L-6TQ176C is the XC3090L-7TQ176C (same package, same logic, slower speed grade - pin-for-pin compatible). Another valid drop-in alternative is the XC3190A-6TQ176C for designs that need more logic, since the XC3190A is pin-compatible with the XC3090L in TQ176 (the XC3100A family extended pinout within the same footprint). Both come from the same Xilinx XC3000 toolchain and use the same bitstream format.
Where can I download the XC3090L datasheet PDF?
The Xilinx XC3090L datasheet PDF is available from the Xilinx legacy product archive and from third-party datasheet aggregators such as datasheet4u.com and digchip.com. According to the XC3090L datasheet index page at datasheet4u.com, the document covers functional description, pinout, configuration modes, timing, and DC/AC characteristics for the entire XC3090L family including the -6 speed grade TQ176 package. The official Xilinx archive PDF is the canonical source.
Where can I find the XC3090L-6TQ176C pinout?
The XC3090L-6TQ176C pinout is provided in the XC3090L family datasheet (TQ176 chapter), showing 144 user I/O pins plus dedicated configuration (M0/M1/M2), clock (CCLK), data (DIN/DOUT), and power/ground pins arranged in a TQFP-176 1.0 mm pitch package. Pin 1 is at the top-left corner with the standard TQFP dot marker, and pins are numbered counter-clockwise around the package perimeter.
What configuration memory does the XC3090L-6TQ176C need?
The XC3090L-6TQ176C uses SRAM-based configuration cells that are volatile, so a boot PROM is mandatory at every power-up. According to the Xilinx XC3000 family reference, a standard XC17xx series serial configuration PROM (e.g., XC1736A, XC1765) provides a one-time-programmed bitstream source, while a microcontroller can drive the serial DIN/CCLK pins directly for in-system reconfiguration. Plan for the boot PROM footprint when designing new PCB layouts.
Is the XC3090L-6TQ176C RoHS compliant?
The XC3090L-6TQ176C is a legacy 0.8 micron CMOS part from the 1990s and was originally released before RoHS took effect, so most XC3090L stock in circulation as of 2026-09-13 is NOT RoHS-certified. Some distributors advertise RoHS-compliant variants, but these are usually third-party re-tested units and not Xilinx-certified. For new RoHS-required designs, choose a modern FPGA family instead.
What are the key specifications engineers should know about the XC3090L-6TQ176C?
Engineers evaluating the XC3090L-6TQ176C should know six core facts: (1) 320 CLBs / ~9,000 usable gates; (2) 144 user I/O in TQ176 package; (3) 3.3 V VCCINT supply; (4) -6 speed grade with ~5 ns combinatorial delay; (5) SRAM-based volatile configuration that requires an XC17xx boot PROM; (6) obsolete lifecycle status with no RoHS certification. Source via trusted brokers only - counterfeits of this part are common.
Is there a Lattice or Altera equivalent for the XC3090L-6TQ176C?
No, there is no direct cross-brand drop-in replacement for the XC3090L-6TQ176C in the same TQ176 footprint. The Altera (now Intel) equivalent FPGAs of that era (FLEX 8000, FLEX 10K, MAX 7000) used different package pinouts and different bitstream formats. Cross-brand alternatives must be designed in on a new PCB footprint; only within-family Xilinx parts (XC3090L-7TQ176C, XC3100A, XC3190A in TQ176) are pin-compatible drop-ins.

Engineering reference data for XC3090L-6TQ176C β€” comparison, design guidance, and compliance information.

Selection Guide

Choose the XC3090L-6TQ176C when repairing a legacy 3.3 V Xilinx board that originally shipped with this exact part, or when designing a 3.3 V glue-logic replacement where the XC3000 toolchain (XACTstep / ISE WebPACK) is acceptable. Choose the XC3090L-7TQ176C if timing margins permit slower logic (saves broker cost). Choose the XC3190A-6TQ176C if you need more logic capacity and have a 5 V supply available. For new designs, prefer a modern 7-series or iCE40 FPGA unless you are constrained to the XC3000 toolchain.

Comparison with Alternatives

Parameter This Product XC3090L-7TQ176C XC3090L-8TQ176C XC3190A-6TQ176C XC3195A-6TQ176C XC3090L-6PQ176C
Package TQFP-176 TQFP-176 - same TQFP-176 - same TQFP-176 - same TQFP-176 - same TQFP-176 (PQ176 code) - same
Brand Xilinx Xilinx Xilinx Xilinx Xilinx Xilinx
Family XC3000L XC3000L - same XC3000L - same XC3100A - extended family XC3100A - extended family XC3000L - same
Logic Cells (CLBs) 320 CLBs 320 CLBs 320 CLBs 484 CLBs 572 CLBs 320 CLBs
Usable Gates ~9,000 ~9,000 ~9,000 ~13,500 ~16,000 ~9,000
Speed Grade -6 -7 (slower) -8 (slower) -6 (same) -6 (same) -6 (same)
VCCINT Supply 3.3 V 3.3 V 3.3 V 5 V (XC3100A family) 5 V (XC3100A family) 3.3 V
User I/O Pins 144 144 144 144 (same TQ176) 144 (same TQ176) 144
Lifecycle Status Obsolete Obsolete Obsolete Obsolete Obsolete Obsolete

Key Differentiators

  • Lowest cost speed-grade drop-in within XC3000L TQ176 (vs XC3090L-7TQ176C)
  • Stays within the XC3000L low-voltage family (3.3 V VCCINT) (vs XC3190A-6TQ176C)
  • Highest volume in the XC3090L family, broadest broker availability (vs XC3090L-8TQ176C)

Design Notes

The XC3090L-6TQ176C requires a 3.3 V VCCINT supply that must ramp monotonically from 0 to 3.3 V within the datasheet-specified power-on reset time. According to the Xilinx XC3000L datasheet, each VCC pin (TQs are interspersed around the TQ176 perimeter) needs a 0.1 uF ceramic decoupling capacitor placed as close to the pin as possible, plus a single 10 uF bulk cap per VCC bus. Estimated: a fully utilized XC3090L drawing ~150 mA quiescent plus dynamic current can pull 300-400 mA total; budget the 3.3 V regulator for at least 500 mA headroom.

Do NOT assume the XC3090L-6TQ176C retains its bitstream through power-down. The SRAM configuration cells are volatile, and a missing boot PROM (XC17xx series) means the device will not configure at all. Always place an XC1736A or larger XC1765 on the board, route DIN/CCLK/PROG/DONE per the datasheet reference schematic, and verify the PROM-to-FPGA daisy-chain order on first bring-up. Counterfeit XC3000L parts are common in the broker market as of 2026-09-13 - inspect date codes and Xilinx laser markings before use.

Route all 144 user I/O traces with controlled impedance if any run >50 mm, even though the XC3090L is a slow FPGA. Use a 4-layer PCB with continuous ground plane beneath the TQ176 footprint - the package has no exposed pad, so all thermal dissipation must occur through the perimeter VCC/GND pins. Per the XC3000L datasheet, maintain at least 0.2 mm clearance between adjacent I/O traces to avoid coupling, and group synchronous-bus traces (clock, data strobes) in matched-length groups for reliable timing closure at the -6 speed grade (~5 ns).

Compliance Information

RoHS
Unknown
REACH
Unknown
AEC-Q100
Not Applicable
Lead Free
Unknown
Halogen Free
Unknown
Conflict Minerals
Unknown

XC3090L is a 1990s-vintage Xilinx part predating RoHS. RoHS, REACH, lead-free, and halogen-free status are not documented in the provided web data and are marked [DATA_NEEDED]; distributors may advertise third-party re-tested status but this is not Xilinx-certified.

Data verified on: 2026-09-13 β€” data verified and curated by XAIPART's component engineering team

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