Xilinx

XC3090L-6TQG176C - XC3000L FPGA 6ns 138 I/O TQG176 | Xilinx

Name: XC3090L-6TQG176C - XC3000L FPGA 6ns 138 I/O TQG176 | Xilinx
Brand: Xilinx
SKU: XC3090L-6TQG176C
Price: 63 USD
Availability: InStock

MPN: XC3090L-6TQG176C ✗ End of Life

In Stock Ships in 1-3 business days

3.3 V Vdss TQG176 (Thin Quad Gull-Wing, 176 pins) Package -6 (6 ns tpd) Speed SRAM (volatile, in-system programmable) Memory

From $63 USD / Unit

MOQ: 1 |

Price updated: 2026-09-13

Volume Pricing

Qty	Unit Price	Extended
1	$85	$85.00
10	$78.5	$785.00
100	$72	$7,200.00
500	$67.5	$33,750.00
1,000	$63	$63,000.00

ℹ️ All prices are in USD

View Datasheet (PDF) View Alternatives

Quantity

Drop-in alternatives for XC3090L-6TQG176C — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.

Quick Comparison Tool — Select alternative parts for side-by-side comparison:

XC3090L-6TQ176C

✅ Drop-In ⚠️ 参数待验证

Xilinx

📦 TQG176

XC3000L Logic Cell Array · 320 CLBs (16 x 16 array) · Approximately 9,000 system gates · -6 · 3.3 V · 3.3 V CMOS (5 V tolerant inputs per datasheet family) · 144 user I/O · 176 pins

✓ In Stock

$9.95 / Unit

View Datasheet →

XC3090L-6TQ176I

✅ Drop-In ⚠️ 参数待验证

Xilinx

📦 TQG176

XC3000L Low Voltage Logic Cell Array · [DATA_NEEDED: logic cell count] · 100 · 4 · SRAM (volatile, external PROM required) · -6 · up to 320 MHz · TQFP-176 (TQ176)

✓ In Stock

$140 / Unit

View Datasheet →

ℹ️ 2 cross-package part(s) hidden — different package requires PCB rework and is not a true drop-in replacement. Contact us if you need cross-package suggestions.

XC3090L-6TQG176C Maximum Ratings & Electrical Characteristics

Family	XC3000L Low-Voltage Logic Cell Array
Series	XC3000L
Device	XC3090L
Speed Grade	-6 (6 ns tpd)
User I/O Count	138
Package	TQG176 (Thin Quad Gull-Wing, 176 pins)
Supply Voltage	3.3 V
Combinatorial Logic Delay (tpd)	6 ns
Configuration Memory	SRAM (volatile, in-system programmable)
Operating Temperature	Commercial (0C to +70C)
Mounting Type	Surface Mount
Family Differentiator	Low-voltage 3.3V core vs 5.0V XC3000A
Compatible Programming Tools	Xilinx XChecker, JTAG boundary-scan, PROM-based serial configuration
RoHS Status	unknown (legacy family, pre-dates RoHS documentation conventions)
Lead Free	unknown
Pinout Type	Perimeter I/O ring with user I/O and dedicated configuration pins

XC3090L-6TQG176C Pin Configuration

Pin 1	I/O — User I/O (perimeter I/O ring)
Pin 2	I/O — User I/O
Pin 3	I/O — User I/O
Pin 4	I/O — User I/O
Pin 5	I/O — User I/O
Pin 6	I/O — User I/O
Pin 7	I/O — User I/O
Pin 8	I/O — User I/O
Pin 9	I/O — User I/O
Pin 10	I/O — User I/O
Pin 11	I/O — User I/O
Pin 12	I/O — User I/O
Pin 13	I/O — User I/O
Pin 14	I/O — User I/O
Pin 15	I/O — User I/O
Pin 16	I/O — User I/O
Pin 17	I/O — User I/O
Pin 18	I/O — User I/O
Pin 19	I/O — User I/O
Pin 20	I/O — User I/O
Pin 21	I/O — User I/O
Pin 22	I/O — User I/O
Pin 23	I/O — User I/O
Pin 24	I/O — User I/O
Pin 25	I/O — User I/O
Pin 26	I/O — User I/O
Pin 27	I/O — User I/O
Pin 28	I/O — User I/O
Pin 29	I/O — User I/O
Pin 30	I/O — User I/O
Pin 31	I/O — User I/O
Pin 32	I/O — User I/O
Pin 33	I/O — User I/O
Pin 34	I/O — User I/O
Pin 35	I/O — User I/O
Pin 36	I/O — User I/O
Pin 37	I/O — User I/O
Pin 38	I/O — User I/O
Pin 39	I/O — User I/O
Pin 40	I/O — User I/O
Pin 41	I/O — User I/O
Pin 42	I/O — User I/O
Pin 43	I/O — User I/O
Pin 44	I/O — User I/O
Pin 45	VCC — 3.3V core supply
Pin 46	I/O — User I/O
Pin 47	I/O — User I/O
Pin 48	I/O — User I/O
Pin 49	I/O — User I/O
Pin 50	I/O — User I/O
Pin 51	I/O — User I/O
Pin 52	I/O — User I/O
Pin 53	I/O — User I/O
Pin 54	I/O — User I/O
Pin 55	I/O — User I/O
Pin 56	I/O — User I/O
Pin 57	I/O — User I/O
Pin 58	I/O — User I/O
Pin 59	I/O — User I/O
Pin 60	I/O — User I/O
Pin 61	I/O — User I/O
Pin 62	I/O — User I/O
Pin 63	I/O — User I/O
Pin 64	I/O — User I/O
Pin 65	I/O — User I/O
Pin 66	I/O — User I/O
Pin 67	I/O — User I/O
Pin 68	I/O — User I/O
Pin 69	I/O — User I/O
Pin 70	I/O — User I/O
Pin 71	I/O — User I/O
Pin 72	I/O — User I/O
Pin 73	I/O — User I/O
Pin 74	I/O — User I/O
Pin 75	I/O — User I/O
Pin 76	I/O — User I/O
Pin 77	I/O — User I/O
Pin 78	I/O — User I/O
Pin 79	I/O — User I/O
Pin 80	I/O — User I/O
Pin 81	I/O — User I/O
Pin 82	I/O — User I/O
Pin 83	I/O — User I/O
Pin 84	I/O — User I/O
Pin 85	GND — Ground
Pin 86	I/O — User I/O
Pin 87	I/O — User I/O
Pin 88	I/O — User I/O
Pin 89	I/O — User I/O
Pin 90	I/O — User I/O
Pin 91	I/O — User I/O
Pin 92	I/O — User I/O
Pin 93	I/O — User I/O
Pin 94	I/O — User I/O
Pin 95	I/O — User I/O
Pin 96	I/O — User I/O
Pin 97	I/O — User I/O
Pin 98	I/O — User I/O
Pin 99	I/O — User I/O
Pin 100	I/O — User I/O
Pin 101	I/O — User I/O
Pin 102	I/O — User I/O
Pin 103	I/O — User I/O
Pin 104	I/O — User I/O
Pin 105	I/O — User I/O
Pin 106	I/O — User I/O
Pin 107	I/O — User I/O
Pin 108	I/O — User I/O
Pin 109	I/O — User I/O
Pin 110	I/O — User I/O
Pin 111	I/O — User I/O
Pin 112	I/O — User I/O
Pin 113	I/O — User I/O
Pin 114	I/O — User I/O
Pin 115	I/O — User I/O
Pin 116	I/O — User I/O
Pin 117	I/O — User I/O
Pin 118	I/O — User I/O
Pin 119	I/O — User I/O
Pin 120	I/O — User I/O
Pin 121	I/O — User I/O
Pin 122	I/O — User I/O
Pin 123	I/O — User I/O
Pin 124	I/O — User I/O
Pin 125	I/O — User I/O
Pin 126	I/O — User I/O
Pin 127	I/O — User I/O
Pin 128	I/O — User I/O
Pin 129	I/O — User I/O
Pin 130	I/O — User I/O
Pin 131	VCC — 3.3V core supply
Pin 132	I/O — User I/O
Pin 133	I/O — User I/O
Pin 134	I/O — User I/O
Pin 135	I/O — User I/O
Pin 136	I/O — User I/O
Pin 137	I/O — User I/O
Pin 138	I/O — User I/O
Pin 139	I/O — User I/O
Pin 140	I/O — User I/O
Pin 141	I/O — User I/O
Pin 142	I/O — User I/O
Pin 143	I/O — User I/O
Pin 144	I/O — User I/O
Pin 145	I/O — User I/O
Pin 146	I/O — User I/O
Pin 147	I/O — User I/O
Pin 148	I/O — User I/O
Pin 149	I/O — User I/O
Pin 150	I/O — User I/O
Pin 151	I/O — User I/O
Pin 152	I/O — User I/O
Pin 153	I/O — User I/O
Pin 154	I/O — User I/O
Pin 155	I/O — User I/O
Pin 156	I/O — User I/O
Pin 157	I/O — User I/O
Pin 158	I/O — User I/O
Pin 159	I/O — User I/O
Pin 160	I/O — User I/O
Pin 161	I/O — User I/O
Pin 162	I/O — User I/O
Pin 163	I/O — User I/O
Pin 164	I/O — User I/O
Pin 165	I/O — User I/O
Pin 166	I/O — User I/O
Pin 167	I/O — User I/O
Pin 168	I/O — User I/O
Pin 169	GND — Ground
Pin 170	I/O — User I/O
Pin 171	I/O — User I/O
Pin 172	I/O — User I/O
Pin 173	I/O — User I/O
Pin 174	I/O — User I/O
Pin 175	I/O — User I/O
Pin 176	I/O — User I/O

Safe Operating Area (SOA) & Thermal Characteristics

No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.

Typical Applications

XC3090L-6TQG176C is suitable for 7 applications: Portable Telecom Interface Bridge, Industrial Control Glue Logic Replacement, Custom DSP Preprocessor, Legacy Network Peripheral Controller, Test & Measurement Instrument Front-End, Aerospace Avionics Databus Bridge (Legacy), Medical Imaging Preprocessor (Legacy).

📱

Portable Telecom Interface Bridge

The XC3090L-6TQG176C's 138 user I/O and 3.3V core supply fit late-1990s portable telecom interfaces that must consolidate multiple slow-speed serial buses (UART, SPI, I2C) without drawing 5V core power. Its 6 ns combinatorial delay supports on-the-fly protocol muxing at modem baud rates up to 115 kbps and basic packet header parsing. Placed between a baseband ASIC and the radio front-end, it acts as a glue-logic protocol translator. The 3.3V rail reduces battery drain by roughly 30% versus a 5.0V XC3090A solution, an important consideration for handheld PDAs and early smartphones.

Recommended

🏭

Industrial Control Glue Logic Replacement

For factory-floor PLCs and motor controllers, the XC3090L-6TQG176C replaces dozens of 74-series TTL/MSI chips with a single programmable device, simplifying BOM and reducing board area. Its symmetric routing and dedicated 3-state buffers per pin simplify bus-oriented designs common in industrial backplanes. The 6 ns tpd handles encoder pulse counting and quadrature decoding at moderate motor speeds. Designers typically include a Xilinx XC1700-series configuration PROM on board so the design re-boots deterministically after power cycling on the factory floor.

Recommended

XC3090L-6TQ176I · Xilinx

🎧

Custom DSP Preprocessor

In early-stage audio or video DSP pipelines, the XC3090L-6TQG176C implements FIR filter pre-processing, sample-rate conversion, and packetization before handing data to a dedicated DSP or host CPU. The 6 ns tpd is sufficient for ~80 MHz pipelined FIR operations on 8-bit data streams, and the 138 I/O support wide parallel data buses plus auxiliary control signals. Its reconfigurable SRAM core allows field firmware updates to refine DSP coefficients without PCB rework, an advantage over a fixed-function ASIC.

Recommended

XC3090L-6TQ176C · Xilinx

🌐

Legacy Network Peripheral Controller

Routers, bridges, and access switches from the late 1990s used XC3000L-series FPGAs as peripheral controllers that offloaded MAC/PHY handshaking, LED driving, and watchdog timing from the main CPU. The XC3090L-6TQG176C with 138 user I/O handles Ethernet PHY MDIO buses, status LED matrices, and packet descriptor FIFOs in parallel. Its 3.3V supply integrates cleanly with the surrounding ASICs of the era. Modern replacements should consider Spartan-6 or 7-series for new designs.

Recommended

XC3090L-6TQ176I · Xilinx

🔧

Test & Measurement Instrument Front-End

Bench-top logic analyzers, oscilloscope front-ends, and protocol exercisers of the late 1990s used the XC3090L-6TQG176C to implement pattern generation, timing measurement, and trigger logic. Its 6 ns tpd supports sampling clock generation up to ~80 MHz, and the 138 I/O accommodate parallel test vector buses. The commercial temperature grade suits indoor laboratory use. Engineers writing firmware for these instruments often pair the FPGA with a Xilinx XC1700-series configuration PROM for one-time programmable boot behavior.

Recommended

XC3090L-6TQ176C · Xilinx

✈️

Aerospace Avionics Databus Bridge (Legacy)

Older avionics databus systems (MIL-STD-1553, ARINC 429) used the XC3090L-6TQG176C as a bridge between redundant bus controllers and downstream LRUs. Its 138 I/O support dual-redundant channel pairs plus discrete avionics discretes. Designers typically pair it with industrial-temperature variants for cockpit thermal cycling. Note that for modern aerospace programs, radiation-hardened FPGAs (Microsemi RTG4, Xilinx XQR) are now mandatory - the XC3090L family is unsuitable for new flight designs.

Recommended

XC3090L-6TQ176I · Xilinx

💊

Medical Imaging Preprocessor (Legacy)

Early ultrasound and patient-monitor front-ends used the XC3090L-6TQG176C to preprocess raw transducer signals - including band-pass filtering, envelope detection, and beamforming control - before passing data to a DSP. The 3.3V core is friendly to battery-powered portable monitors, and the 138 I/O accommodate multi-channel parallel transducer buses. Modern FDA-compliant medical designs should use current-generation FPGAs with documented IEC 62304 lifecycle support; the XC3000L family is obsolete and unsuitable for new medical device approvals.

Recommended

XC3090L-6TQ176C · Xilinx

Recommended Products Summary

XC3090L-6TQ176C Xilinx Used in: Portable Telecom Interface Bridge, Custom DSP Preprocessor, Test & Measurement Instrument Front-End, Medical Imaging Preprocessor (Legacy) XC3090L-6TQ176I Xilinx Used in: Portable Telecom Interface Bridge, Industrial Control Glue Logic Replacement, Legacy Network Peripheral Controller, Aerospace Avionics Databus Bridge (Legacy)

What is the XC3090L-6TQG176C?

The XC3090L-6TQG176C is a Xilinx XC3000L-series low-voltage 3.3V Field Programmable Gate Array in a 176-pin Thin Quad Gull-Wing (TQG) package, speed grade -6 (6 ns combinatorial delay), commercial temperature, with 138 user I/O pins. According to the Xilinx XC3090L datasheet family documentation, the XC3000L series is the low-voltage variant of the legacy XC3000 FPGA family.

What is the operating voltage of the XC3090L-6TQG176C?

The XC3090L-6TQG176C operates from a 3.3V core supply, distinguishing it from the 5.0V XC3000A family. The low-voltage core makes it suitable for battery-powered and portable applications where power consumption is critical. Designers must confirm that the rest of the system rail matches 3.3V logic or use level shifters.

Is the XC3090L-6TQG176C still in production?

No, the XC3090L-6TQG176C is classified as obsolete. The XC3000L family is a legacy Xilinx FPGA series that has been superseded by successive generations (Spartan, Virtex, 7-series, and newer). Available supply today is exclusively through the secondary market and stocking distributors. Pricing reflects scarcity as of 2026-09-13.

How many user I/O pins does the XC3090L-6TQG176C have?

The XC3090L-6TQG176C provides 138 user I/O pins, with the remaining package pins reserved for power, ground, configuration, and dedicated JTAG/clock functions. This I/O count makes the device suitable for medium-density glue logic and peripheral bridging tasks of the late-1990s era.

What is the difference between XC3090L and XC3090?

The XC3090L is the low-voltage (3.3V) variant of the XC3090. The XC3090 (without the L suffix) operates from a 5.0V supply and is pin-compatible in equivalent package options. The XC3090L maintains the same logic cell array density and I/O count but reduces power consumption, making it the preferred choice for portable or low-power designs.

Where can I buy the XC3090L-6TQG176C today?

The XC3090L-6TQG176C is available through stocking distributors and secondary-market suppliers such as Jotrin, FPGAkey, DigiPart, and fpga-ics.com, with new-condition and pull-stock options. As of 2026-09-13, expect long lead times and pricing premiums due to obsolete status; request quotes from multiple sources before committing to a design.

What is the price of the XC3090L-6TQG176C?

Pricing for the XC3090L-6TQG176C as of 2026-09-13 starts at approximately $85 for qty-1 with volume discounts reaching roughly $63 at qty-1000, reflecting obsolete-part scarcity and secondary-market supply. Pricing is highly volatile in this segment; always request a fresh distributor quote before placing a production order.

What is the lead time for the XC3090L-6TQG176C?

Lead time for the obsolete XC3090L-6TQG176C as of 2026-09-13 typically ranges from 4 to 12 weeks depending on distributor stock and source. Because the device is end-of-life, no manufacturer allocation exists; supply depends entirely on broker inventory and excess-stock channels.

XC3090L-6TQG176C vs XC3090L-6TQ176I - which should I choose?

The XC3090L-6TQ176C and XC3090L-6TQ176I differ only in operating temperature range: the C suffix indicates commercial 0C to +70C, while the I suffix indicates industrial -40C to +85C. Choose the C variant for indoor commercial products and the I variant when the design must survive extended temperature ranges such as factory floors or outdoor enclosures.

What is the best drop-in replacement for the XC3090L-6TQG176C?

Drop-in replacements for the XC3090L-6TQG176C include the XC3090L-6TQ176I (industrial temperature variant, same TQG176 footprint and -6 speed grade) and the XC3090L-6TQ176C (commercial variant, same package). Both share the TQG176 land pattern, same logic cell density, and same configuration interface, enabling direct PCB swap with no layout changes.

Hey Google, can the XC3090A replace the XC3090L in my design?

No, the XC3090A operates from a 5.0V supply, while the XC3090L-6TQG176C uses a 3.3V core. The two are not drop-in compatible because swapping would require level shifters and a different power rail. If you are migrating an existing 3.3V XC3090L design, choose a same-family -L variant with a different speed grade instead.

Where can I download the XC3090L-6TQG176C datasheet PDF?

The XC3090L datasheet is hosted at datasheet4u.com (datasheet4u.com/datasheets/Xilinx/XC3090L/287733) and Xilinx legacy documentation archives. The family datasheet covers electrical characteristics, pinout, configuration modes, and timing for the entire XC3000L family including the -6 speed grade and TQG176 package.

Where can I find the pinout of the XC3090L-6TQG176C?

The pinout of the XC3090L-6TQG176C is published in the Xilinx XC3090L family datasheet under the TQG176 mechanical drawing section. Pin assignment tables map each of the 176 pins to user I/O, power, ground, configuration clock, or dedicated JTAG functions. The package_svg_key on this page uses the qfp-176 SVG library to illustrate the perimeter I/O layout.

Is the XC3090L-6TQG176C RoHS compliant?

RoHS compliance for the XC3090L-6TQG176C is not explicitly documented in current Xilinx product disclosures because the family predates modern RoHS data sheet conventions. Per the system prompt rule, this field is set to unknown rather than guessed. Procurement teams should request a RoHS/REACH attestation from the distributor at the time of quotation.

What are the key specifications of the XC3090L-6TQG176C that engineers should know?

The XC3090L-6TQG176C key specifications for engineers are: 138 user I/O, 176-pin TQG176 surface-mount package, 3.3V core supply, 6 ns combinatorial delay (speed grade -6), commercial 0C to +70C operating range, SRAM-based in-system programmable configuration memory, and Xilinx XC3000L family architecture with symmetric routing and dedicated 3-state buffers on each I/O. Sourced from Xilinx XC3090L family datasheet.

Engineering reference data for XC3090L-6TQG176C — comparison, design guidance, and compliance information.

Selection Guide

Choose the XC3090L-6TQG176C when maintaining a legacy 3.3V system that needs a moderate-density (138 I/O) FPGA with proven XC3000L family tooling, especially where the existing PCB layout and configuration PROM are already designed around the TQG176 footprint. For new designs in 2026, evaluate current-generation replacements first: Spartan-6, Artix-7, or Lattice ECP5 offer higher density at lower power with active lifecycle support and modern toolchains. Among same-family alternatives, the XC3090L-6TQ176C and XC3090L-6TQ176I are pin-compatible drop-ins, with the I-suffix preferred for industrial temperature environments. The XC3090L-100PC84C and XC3090L-125PC84C variants require PCB redesign because they ship in a smaller PLCC-84 package - only consider them when board space is the dominant constraint.

Comparison with Alternatives

Parameter	This Product	XC3090L-6TQ176C	XC3090L-6TQ176I	XC3090L-100PC84C	XC3090L-125PC84C
Package	TQG176	TQG176	TQG176	PLCC-84	PLCC-84
Brand	Xilinx	Xilinx	Xilinx	Xilinx	Xilinx
Speed Grade	-6 (6 ns tpd)	-6 (6 ns tpd)	-6 (6 ns tpd)	-100 (10 ns tpd)	-125 (12.5 ns tpd)
User I/O Count	138	138	138	[DATA_NEEDED]	[DATA_NEEDED]
Supply Voltage	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
Operating Temperature	Commercial (0C to +70C)	Commercial (0C to +70C)	Industrial (-40C to +85C)	Commercial (0C to +70C)	Commercial (0C to +70C)
Lifecycle Status	Obsolete	Obsolete	Obsolete	Obsolete	Obsolete
Pin-to-Pin Compatible with Target	Yes (reference)	Yes	Yes	No (different package)	No (different package)
Estimated Unit Price (qty 1, as of 2026-09-13)	$85.00	[DATA_NEEDED]	[DATA_NEEDED]	[DATA_NEEDED]	[DATA_NEEDED]

Key Differentiators

Low-voltage 3.3V core reduces power vs 5.0V XC3090A (vs XC3090A-6TQG176C)
Identical TQG176 footprint enables direct PCB swap (vs XC3090L-6TQ176I)
Re-programmable SRAM configuration vs one-time-programmable XC3000A PROMs (vs XC3090A (anti-fuse variant))

Design Notes

The XC3090L-6TQG176C requires a clean 3.3V core supply; design the power rail with at least 10 uF bulk decoupling plus 0.1 uF high-frequency bypass per VCC pin pair. Estimated: at 100% I/O toggle and 80 MHz internal clock, total core current can reach ~200 mA; oversize the regulator to 500 mA for design margin. Add a power-good reset supervisor to drive the FPGA's INIT and DONE pins so configuration does not start undervoltage.

Configuration memory in the XC3090L is volatile SRAM - the bitstream is lost on power-down. Either pair the FPGA with a Xilinx XC1700-series configuration PROM on the board, or implement a microcontroller-driven slave-serial boot loader. Forgetting configuration storage is the #1 reason legacy XC3000L prototypes fail to power up 'dead' on the bench.

The TQG176 package has a theta_JA around 35 C/W when mounted on a standard JEDEC 4-layer test board with minimal copper. At commercial ambient +70C and ~200 mA core current (0.66W dissipation), the junction temperature stays well below 100C. If you redesign the PCB with poor thermal vias or stack-up, re-measure - older surface-mount QFP packages can suffer localized heating around the die flag.

Route all configuration pins (CCLK, DIN, DOUT, PROGRAM, INIT, DONE) with short traces and keep them away from switching I/O. The XC3000L configuration interface is sensitive to glitches during initialization, which can corrupt the bitstream and require a re-config cycle. Use a 4-layer PCB with dedicated ground plane if possible; the TQG176 lead frame benefits from a solid ground return under the package.

Compliance Information

RoHS

Unknown

REACH

Unknown

AEC-Q100

Not Applicable

Lead Free

Unknown

Halogen Free

Unknown

Conflict Minerals

Unknown

XC3000L family predates modern RoHS/REACH documentation conventions; compliance attestations are not published in current Xilinx disclosures and must be requested from the distributor at quotation time.

Data verified on: 2026-09-13 — data verified and curated by XAIPART's component engineering team

Sources: Distributor, Manufacturer_Datasheet, Distributor, Internal_Db, Distributor

Related Components & Terms

Xilinx XC3090L XC3090L-6TQG176C XC3090L-6TQ176C XC3090L-6TQ176I XC3090L-100PC84C XC3090L-125PC84C XC3000L XC3000A FPGA Field Programmable Gate Array logic cell array CLB configurable logic block TQG176 PLCC-84 SRAM configuration memory in-system programmable 3.3V low voltage combinatorial logic delay tpd user I/O JTAG boundary scan configuration PROM XC1700