XC3090L-8PCG84C vs XC3090L-8PC84BKJ Comparison
Detailed side-by-side comparison of XC3090L-8PCG84C by Xilinx and XC3090L-8PC84BKJ by Xilinx. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Xilinx
XC3090L-8PCG84C
XC3090L-8PCG84C - 84-Pin PLCC FPGA | Xilinx XC3000 Family
XC3090L-8PCG84C β Last Time BuyXilinx
XC3090L-8PC84BKJ
XC3090L-8PC84BKJ - XC3000L 5V FPGA 84-Pin PLCC | AMD Xilinx
XC3090L-8PC84BKJ ObsoleteSpecification Comparison
| Parameter | XC3090L-8PCG84C | XC3090L-8PC84BKJ |
|---|---|---|
| Brand | Xilinx | Xilinx |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $26.10 | $19.20 |
| Family | XC3000A/L Series FPGA | XC3000L Low-Voltage Logic Cell Array |
| Logic Cells / CLBs | 70 Configurable Logic Blocks | β |
| Gate Count | 6,400 gates (typical) | β |
| Configuration Program Store | 64,160 bits | β |
| User I/O Pins | 70 (maximum) | β |
| Package | 84-pin PLCC (J-Lead, PCG84) | 84-pin PLCC (J-Lead), windowed ceramic (BKJ) |
| Supply Voltage (VCC) | 3.0 V to 3.6 V (low-voltage 'L' variant) | β |
| Speed Grade | -8 (moderate) | -8 (approx. 70 MHz toggle) |
| Operating Temperature | 0 C to +70 C (commercial 'C' suffix) | 0C to +70C (commercial, C suffix) |
| Configuration Modes | Serial master/slave, parallel master/slave, peripheral mode | β |
| Process Technology | [DATA_NEEDED: process node] | 5 ns CMOS SRAM |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | β |
| Configuration Clock Range | [DATA_NEEDED: CCLK frequency range] | β |
| Mounting Type | Surface Mount (PLCC J-Lead) | Through-hole (PLCC socket) |
| RoHS Status | unknown | unknown - legacy windowed ceramic package |
| Lead-Free | unknown | β |
| MSL Level | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL rating] |
| Programming Technology | SRAM-based, in-system reconfigurable | β |
| Logic Cells | β | 320 |
| Usable Gates | β | 6,000 |
| Configuration Memory | β | 64,160 bits |
| Maximum User I/O | β | 144 |
| Supply Voltage (Vcc) | β | 3.0 V to 3.6 V (low-voltage) |
| Configuration Method | β | Serial/parallel SRAM, in-system reconfigurable |
| Boundary Scan | β | IEEE 1149.1 (JTAG) compliant |
| Configuration Pins | β | M0, M1, M2 mode-select + DIN, DOUT, CCLK, INIT |