XC3090LTM-100PC84C vs XC3090L-8PCG84C Comparison
Detailed side-by-side comparison of XC3090LTM-100PC84C by Xilinx and XC3090L-8PCG84C by Xilinx. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Xilinx
XC3090LTM-100PC84C
XC3090LTM-100PC84C - 6K Gate, 320-Cell FPGA 5V 84-PLCC | Xilinx
XC3090LTM-100PC84C ObsoleteXilinx
XC3090L-8PCG84C
XC3090L-8PCG84C - 84-Pin PLCC FPGA | Xilinx XC3000 Family
XC3090L-8PCG84C β Last Time BuySpecification Comparison
| Parameter | XC3090LTM-100PC84C | XC3090L-8PCG84C |
|---|---|---|
| Brand | Xilinx | Xilinx |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $41.40 | $26.10 |
| Manufacturer | Xilinx | β |
| Series | XC3000L Logic Cell Array Family | β |
| Family | XC3090 | XC3000A/L Series FPGA |
| Logic Cells / CLBs | 320 Configurable Logic Blocks | 70 Configurable Logic Blocks |
| Typical Gate Count | 5,000 to 6,000 gates | β |
| Technology | 5V CMOS, SRAM-based configuration | β |
| Performance Grade | 100 MHz | β |
| Package | 84-pin PLCC (PC84) | 84-pin PLCC (J-Lead, PCG84) |
| Terminal Form | J-Lead (Surface Mount) | β |
| Package Code | QCCJ (Plastic Leaded Chip Carrier) | β |
| Operating Temperature Grade | Commercial | β |
| Configuration Memory | SRAM (volatile, requires external bitstream) | β |
| I/O Standard | 5V CMOS / TTL compatible | β |
| Programming Method | External configuration PROM or microcontroller bitstream load | β |
| RoHS Status | [DATA_NEEDED: legacy device, pre-RoHS era] | unknown |
| Lifecycle Status | Obsolete / Discontinued by manufacturer | β |
| Gate Count | β | 6,400 gates (typical) |
| Configuration Program Store | β | 64,160 bits |
| User I/O Pins | β | 70 (maximum) |
| Supply Voltage (VCC) | β | 3.0 V to 3.6 V (low-voltage 'L' variant) |
| Speed Grade | β | -8 (moderate) |
| Operating Temperature | β | 0 C to +70 C (commercial 'C' suffix) |
| Configuration Modes | β | Serial master/slave, parallel master/slave, peripheral mode |
| Process Technology | β | [DATA_NEEDED: process node] |
| JTAG / Boundary Scan | β | IEEE 1149.1 compliant |
| Configuration Clock Range | β | [DATA_NEEDED: CCLK frequency range] |
| Mounting Type | β | Surface Mount (PLCC J-Lead) |
| Lead-Free | β | unknown |
| MSL Level | β | [DATA_NEEDED: MSL rating] |
| Programming Technology | β | SRAM-based, in-system reconfigurable |