XC3090LTM-100PC84C vs XC3090L-8PCG84C Vergleich
Detaillierter Direktvergleich von XC3090LTM-100PC84C von Xilinx und XC3090L-8PCG84C von Xilinx. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Xilinx
XC3090L-8PCG84C - 84-Pin PLCC FPGA | Xilinx XC3000 Family
XC3090L-8PCG84C ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | XC3090LTM-100PC84C | XC3090L-8PCG84C |
|---|---|---|
| Marke | Xilinx | Xilinx |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $41,40 | $26,10 |
| Manufacturer | Xilinx | — |
| Series | XC3000L Logic Cell Array Family | — |
| Family | XC3090 | XC3000A/L Series FPGA |
| Logic Cells / CLBs | 320 Configurable Logic Blocks | 70 Configurable Logic Blocks |
| Typical Gate Count | 5,000 to 6,000 gates | — |
| Technology | 5V CMOS, SRAM-based configuration | — |
| Performance Grade | 100 MHz | — |
| Gehäuse | 84-pin PLCC (PC84) | 84-pin PLCC (J-Lead, PCG84) |
| Terminal Form | J-Lead (Surface Mount) | — |
| Package Code | QCCJ (Plastic Leaded Chip Carrier) | — |
| Operating Temperature Grade | Commercial | — |
| Configuration Memory | SRAM (volatile, requires external bitstream) | — |
| I/O Standard | 5V CMOS / TTL compatible | — |
| Programming Method | External configuration PROM or microcontroller bitstream load | — |
| RoHS-Status | [DATA_NEEDED: legacy device, pre-RoHS era] | unknown |
| Lebenszyklusstatus | Obsolete / Discontinued by manufacturer | — |
| Gate Count | — | 6,400 gates (typical) |
| Configuration Program Store | — | 64,160 bits |
| User I/O Pins | — | 70 (maximum) |
| Supply Voltage (VCC) | — | 3.0 V to 3.6 V (low-voltage 'L' variant) |
| Speed Grade | — | -8 (moderate) |
| Betriebstemperatur | — | 0 C to +70 C (commercial 'C' suffix) |
| Configuration Modes | — | Serial master/slave, parallel master/slave, peripheral mode |
| Process Technology | — | [DATA_NEEDED: process node] |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |
| Configuration Clock Range | — | [DATA_NEEDED: CCLK frequency range] |
| Montageart | — | Surface Mount (PLCC J-Lead) |
| Lead-Free | — | unknown |
| MSL-Level | — | [DATA_NEEDED: MSL rating] |
| Programming Technology | — | SRAM-based, in-system reconfigurable |