A3PE3000-FG896 vs A3PE3000L-FGG896M Vergleich
Detaillierter Direktvergleich von A3PE3000-FG896 von Microchip Technology und A3PE3000L-FGG896M von Microchip Technology. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Microchip Technology
A3PE3000-FG896 - ProASIC3E Flash FPGA 620 I/O | Microchip
A3PE3000-FG896 ✓ AktivMicrochip Technology
A3PE3000L-FGG896M - 3M-Gate Low-Power Flash FPGA | Microchip
A3PE3000L-FGG896M ✓ AktivSpezifikationsvergleich
| Parameter | A3PE3000-FG896 | A3PE3000L-FGG896M |
|---|---|---|
| Marke | Microchip Technology | Microchip Technology |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $129,80 | $0,00 |
| Family | ProASIC3E | ProASIC3L (Flash-based FPGA) |
| System Gates | 3000000 | 3,000,000 |
| Number of I/O | 620 | — |
| Embedded Memory | 516096 bit | — |
| Maximum System Frequency | 231 MHz | — |
| Process Technology | 130 nm | 130-nm, 7-layer metal (6 copper), flash-based CMOS |
| Core Supply Voltage | 1.5 V | — |
| Configuration Memory | Flash (non-volatile, reprogrammable) | — |
| Logic Element Count (per distributor listing) | [DATA_NEEDED: verified LE/KLE count] | — |
| Gehäuse | 896-BGA (FBGA) | 896-ball FBGA (FGG896), 1 mm pitch |
| Montagestil | SMD/SMT | — |
| Betriebstemperatur | 0 C to +70 C | 0 to 70 C |
| Packaging | Tray | — |
| Speed Grade | Standard (-) | — |
| Architecture | VersaTile 3-input LUT / D flip-flop / latch | — |
| Global Networks | VersaNet low-skew high-fanout networks | — |
| RoHS-Status | Non-green package (FG prefix; FGG variants are RoHS green) | — |
| Logic Cells | — | 75,264 |
| User I/Os | — | Up to 616 (620 per DigiKey listing) |
| Embedded SRAM | — | 504 kbits true dual-port |
| Core Voltage | — | 1.2 V to 1.5 V |
| Versorgungsspannung | — | 1.5 V |
| Logic Family | — | CMOS |
| Montageart | — | Surface Mount |
| Configuration | — | Non-volatile flash, live-at-power-up Level 0, single-chip |
| Low-Power Feature | — | Flash*Freeze technology |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| Input Features | — | Schmitt trigger option on single-ended inputs; weak pull-up/pull-down |